Message ID | 20230808061356.2215158-1-zengheng4@huawei.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [1/5] kselftest/arm64: add float-point feature to hwcap test | expand |
On Tue, Aug 08, 2023 at 02:13:51PM +0800, Zeng Heng wrote: > +static void fp_sigill(void) > +{ > + /* FMOV S0, #1 */ > + asm volatile(".inst 0x1e2e1000" : : : ); > +} > + That should assemble even with the toolchain configured for v8.0 so there shouldn't be any need to hand encode here. Otherwise Reviewed-by: Mark Brown <broonie@kernel.org>
在 2023/8/8 20:25, Mark Brown 写道: > On Tue, Aug 08, 2023 at 02:13:51PM +0800, Zeng Heng wrote: > >> +static void fp_sigill(void) >> +{ >> + /* FMOV S0, #1 */ >> + asm volatile(".inst 0x1e2e1000" : : : ); >> +} >> + > That should assemble even with the toolchain configured for v8.0 so > there shouldn't be any need to hand encode here. Otherwise > > Reviewed-by: Mark Brown <broonie@kernel.org> I would update to assemble language in V2. Zeng Heng
diff --git a/tools/testing/selftests/arm64/abi/hwcap.c b/tools/testing/selftests/arm64/abi/hwcap.c index 6a0adf916028..eaf9881c2e43 100644 --- a/tools/testing/selftests/arm64/abi/hwcap.c +++ b/tools/testing/selftests/arm64/abi/hwcap.c @@ -39,6 +39,12 @@ static void cssc_sigill(void) asm volatile(".inst 0xdac01c00" : : : "x0"); } +static void fp_sigill(void) +{ + /* FMOV S0, #1 */ + asm volatile(".inst 0x1e2e1000" : : : ); +} + static void ilrcpc_sigill(void) { /* LDAPUR W0, [SP, #8] */ @@ -235,6 +241,13 @@ static const struct hwcap_data { .cpuinfo = "cssc", .sigill_fn = cssc_sigill, }, + { + .name = "FP", + .at_hwcap = AT_HWCAP, + .hwcap_bit = HWCAP_FP, + .cpuinfo = "fp", + .sigill_fn = fp_sigill, + }, { .name = "LRCPC", .at_hwcap = AT_HWCAP,
Add the FP feature check in the set of hwcap tests. Signed-off-by: Zeng Heng <zengheng4@huawei.com> --- tools/testing/selftests/arm64/abi/hwcap.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)