Message ID | 20230808190144.19999-2-brgl@bgdev.pl (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | arm64: dts: qcom: enable EMAC1 on sa8775p | expand |
Context | Check | Description |
---|---|---|
netdev/tree_selection | success | Not a local patch |
On 8.08.2023 21:01, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > Add a node for the SerDes PHY used by EMAC1 on sa8775p-ride. > > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > Reviewed-by: Andrew Halaney <ahalaney@redhat.com> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi index 7b55cb701472..38d10af37ab0 100644 --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi @@ -1846,6 +1846,15 @@ serdes0: phy@8901000 { status = "disabled"; }; + serdes1: phy@8902000 { + compatible = "qcom,sa8775p-dwmac-sgmii-phy"; + reg = <0x0 0x08902000 0x0 0xe10>; + clocks = <&gcc GCC_SGMI_CLKREF_EN>; + clock-names = "sgmi_ref"; + #phy-cells = <0>; + status = "disabled"; + }; + pdc: interrupt-controller@b220000 { compatible = "qcom,sa8775p-pdc", "qcom,pdc"; reg = <0x0 0x0b220000 0x0 0x30000>,