| Message ID | 20230809180145.53158-1-afd@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/3] arm64: dts: ti: k3-j721e: Enable C7x DSP nodes at the board level | expand |
Thanks Andrew On 8/9/2023 11:31 PM, Andrew Davis wrote: > C7x DSP nodes defined in the top-level J721e SoC dtsi files are incomplete > and will not be functional unless they are extended with both mboxes and > memory-region information. > > As theses only known about at the board integration level, these nodes > should only be enabled when provided with this information. > > Disable the C7x DSP nodes in the dtsi files and only enable the ones that > are given the required mboxes and memory-region on a given board. > > Signed-off-by: Andrew Davis <afd@ti.com> > --- > arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts | 1 + > arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 1 + > arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 1 + > arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi | 1 + > 4 files changed, 4 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts > index 66aac145e7530..d1235e7c786d6 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts > +++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts > @@ -1024,6 +1024,7 @@ &c66_1 { > }; > > &c71_0 { > + status = "okay"; > mboxes = <&mailbox0_cluster4>, <&mbox_c71_0>; > memory-region = <&c71_0_dma_memory_region>, > <&c71_0_memory_region>; Series tested on J721E, J784S4 platforms However I need to apply https://lore.kernel.org/linux-iommu/0-v2-d2762acaf50a+16d-iommu_group_locking2_jgg@nvidia.com/ patch Tested-by: Udit Kumar <u-kumar1@ti.com> https://gist.github.com/uditkumarti/b6320a06fadaaaf174fc0431949f11e1 > diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > index 3acd55ffd4ffc..1aeb97b42b34b 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi > @@ -2134,6 +2134,7 @@ c71_0: dsp@64800000 { > ti,sci-proc-ids = <0x30 0xff>; > resets = <&k3_reset 15 1>; > firmware-name = "j7-c71_0-fw"; > + status = "disabled"; > }; > > icssg0: icssg@b000000 { > diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts > index 0ee4f38ec8f03..377588ba30998 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts > +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts > @@ -1110,6 +1110,7 @@ &c66_1 { > }; > > &c71_0 { > + status = "okay"; > mboxes = <&mailbox0_cluster4>, <&mbox_c71_0>; > memory-region = <&c71_0_dma_memory_region>, > <&c71_0_memory_region>; > diff --git a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi > index e90e43202546e..3c31ab57e959c 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi > @@ -436,6 +436,7 @@ &c66_1 { > }; > > &c71_0 { > + status = "okay"; > mboxes = <&mailbox0_cluster4>, <&mbox_c71_0>; > memory-region = <&c71_0_dma_memory_region>, > <&c71_0_memory_region>;
On 8/9/23 13:01, Andrew Davis wrote: > +++ b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi > @@ -436,6 +436,7 @@ &c66_1 { > }; > > &c71_0 { > + status = "okay"; > mboxes = <&mailbox0_cluster4>, <&mbox_c71_0>; > memory-region = <&c71_0_dma_memory_region>, > <&c71_0_memory_region>; > -- series acked. Acked-by: Hari Nagalla <hnagalla@ti.com>
Hi Andrew Davis, On Wed, 09 Aug 2023 13:01:43 -0500, Andrew Davis wrote: > C7x DSP nodes defined in the top-level J721e SoC dtsi files are incomplete > and will not be functional unless they are extended with both mboxes and > memory-region information. > > As theses only known about at the board integration level, these nodes > should only be enabled when provided with this information. > > [...] I have applied the following to branch ti-k3-dts-next on [1]. Thank you for doing the cleanups! [1/3] arm64: dts: ti: k3-j721e: Enable C7x DSP nodes at the board level commit: 35dba715971733d5fdfd98f4772ccc679d4989c2 [2/3] arm64: dts: ti: k3-j784s4: Enable C7x DSP nodes at the board level commit: c23b203b929f22fb22f2b07c1e5d658a7d455263 [3/3] arm64: dts: ti: k3-j721e: Enable C6x DSP nodes at the board level commit: 00ae4c39cd16ef8b1662c5915dda08eb28eed762 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent up the chain during the next merge window (or sooner if it is a relevant bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. [1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts index 66aac145e7530..d1235e7c786d6 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts @@ -1024,6 +1024,7 @@ &c66_1 { }; &c71_0 { + status = "okay"; mboxes = <&mailbox0_cluster4>, <&mbox_c71_0>; memory-region = <&c71_0_dma_memory_region>, <&c71_0_memory_region>; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi index 3acd55ffd4ffc..1aeb97b42b34b 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi @@ -2134,6 +2134,7 @@ c71_0: dsp@64800000 { ti,sci-proc-ids = <0x30 0xff>; resets = <&k3_reset 15 1>; firmware-name = "j7-c71_0-fw"; + status = "disabled"; }; icssg0: icssg@b000000 { diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts index 0ee4f38ec8f03..377588ba30998 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts @@ -1110,6 +1110,7 @@ &c66_1 { }; &c71_0 { + status = "okay"; mboxes = <&mailbox0_cluster4>, <&mbox_c71_0>; memory-region = <&c71_0_dma_memory_region>, <&c71_0_memory_region>; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi index e90e43202546e..3c31ab57e959c 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi @@ -436,6 +436,7 @@ &c66_1 { }; &c71_0 { + status = "okay"; mboxes = <&mailbox0_cluster4>, <&mbox_c71_0>; memory-region = <&c71_0_dma_memory_region>, <&c71_0_memory_region>;
C7x DSP nodes defined in the top-level J721e SoC dtsi files are incomplete and will not be functional unless they are extended with both mboxes and memory-region information. As theses only known about at the board integration level, these nodes should only be enabled when provided with this information. Disable the C7x DSP nodes in the dtsi files and only enable the ones that are given the required mboxes and memory-region on a given board. Signed-off-by: Andrew Davis <afd@ti.com> --- arch/arm64/boot/dts/ti/k3-j721e-beagleboneai64.dts | 1 + arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 1 + arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 1 + arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi | 1 + 4 files changed, 4 insertions(+)