diff mbox series

[net-next,2/2] net: phy: Introduce PSGMII PHY interface mode

Message ID 20230810102309.223183-2-robert.marko@sartura.hr (mailing list archive)
State Superseded
Delegated to: Netdev Maintainers
Headers show
Series [net-next,1/2] dt-bindings: net: ethernet-controller: add PSGMII mode | expand

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netdev/header_inline success No static functions without inline keyword in header files
netdev/build_32bit success Errors and warnings before: 1729 this patch: 1729
netdev/cc_maintainers success CCed 8 of 8 maintainers
netdev/build_clang fail Errors and warnings before: 1642 this patch: 1642
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netdev/build_allmodconfig_warn success Errors and warnings before: 1738 this patch: 1738
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Commit Message

Robert Marko Aug. 10, 2023, 10:22 a.m. UTC 
From: Gabor Juhos <j4g8y7@gmail.com>

The PSGMII interface is similar to QSGMII. The main difference
is that the PSGMII interface combines five SGMII lines into a
single link while in QSGMII only four lines are combined.

Similarly to the QSGMII, this interface mode might also needs
special handling within the MAC driver.

It is commonly used by Qualcomm with their QCA807x PHY series and
modern WiSoC-s.

Add definitions for the PHY layer to allow to express this type
of connection between the MAC and PHY.

Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
---
 drivers/net/phy/phy-core.c | 2 ++
 drivers/net/phy/phylink.c  | 3 +++
 include/linux/phy.h        | 3 +++
 3 files changed, 8 insertions(+)

Comments

Russell King (Oracle) Aug. 10, 2023, 10:37 a.m. UTC | #1 
On Thu, Aug 10, 2023 at 12:22:55PM +0200, Robert Marko wrote:
> From: Gabor Juhos <j4g8y7@gmail.com>
> 
> The PSGMII interface is similar to QSGMII. The main difference
> is that the PSGMII interface combines five SGMII lines into a
> single link while in QSGMII only four lines are combined.

Please also update the docs at Documentation/networking/phy.rst
section "PHY interface modes" to describe this mode. Thanks.
Simon Horman Aug. 11, 2023, 10:54 a.m. UTC | #2 
On Thu, Aug 10, 2023 at 12:22:55PM +0200, Robert Marko wrote:
> From: Gabor Juhos <j4g8y7@gmail.com>
> 
> The PSGMII interface is similar to QSGMII. The main difference
> is that the PSGMII interface combines five SGMII lines into a
> single link while in QSGMII only four lines are combined.
> 
> Similarly to the QSGMII, this interface mode might also needs
> special handling within the MAC driver.
> 
> It is commonly used by Qualcomm with their QCA807x PHY series and
> modern WiSoC-s.
> 
> Add definitions for the PHY layer to allow to express this type
> of connection between the MAC and PHY.
> 
> Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
> Signed-off-by: Robert Marko <robert.marko@sartura.hr>

...

> diff --git a/include/linux/phy.h b/include/linux/phy.h
> index ba08b0e60279..23756a10d40b 100644
> --- a/include/linux/phy.h
> +++ b/include/linux/phy.h
> @@ -147,6 +147,7 @@ typedef enum {
>  	PHY_INTERFACE_MODE_XGMII,
>  	PHY_INTERFACE_MODE_XLGMII,
>  	PHY_INTERFACE_MODE_MOCA,
> +	PHY_INTERFACE_MODE_PSGMII,

Hi Gabor an Robert,

Please add PHY_INTERFACE_MODE_PSGMII to the kernel doc for phy_interface_t
which appears a little earlier in phy.h

>  	PHY_INTERFACE_MODE_QSGMII,
>  	PHY_INTERFACE_MODE_TRGMII,
>  	PHY_INTERFACE_MODE_100BASEX,

...
Robert Marko Aug. 11, 2023, 10:58 a.m. UTC | #3 
On Fri, Aug 11, 2023 at 12:54 PM Simon Horman <horms@kernel.org> wrote:
>
> On Thu, Aug 10, 2023 at 12:22:55PM +0200, Robert Marko wrote:
> > From: Gabor Juhos <j4g8y7@gmail.com>
> >
> > The PSGMII interface is similar to QSGMII. The main difference
> > is that the PSGMII interface combines five SGMII lines into a
> > single link while in QSGMII only four lines are combined.
> >
> > Similarly to the QSGMII, this interface mode might also needs
> > special handling within the MAC driver.
> >
> > It is commonly used by Qualcomm with their QCA807x PHY series and
> > modern WiSoC-s.
> >
> > Add definitions for the PHY layer to allow to express this type
> > of connection between the MAC and PHY.
> >
> > Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
> > Signed-off-by: Robert Marko <robert.marko@sartura.hr>
>
> ...
>
> > diff --git a/include/linux/phy.h b/include/linux/phy.h
> > index ba08b0e60279..23756a10d40b 100644
> > --- a/include/linux/phy.h
> > +++ b/include/linux/phy.h
> > @@ -147,6 +147,7 @@ typedef enum {
> >       PHY_INTERFACE_MODE_XGMII,
> >       PHY_INTERFACE_MODE_XLGMII,
> >       PHY_INTERFACE_MODE_MOCA,
> > +     PHY_INTERFACE_MODE_PSGMII,
>
> Hi Gabor an Robert,
>
> Please add PHY_INTERFACE_MODE_PSGMII to the kernel doc for phy_interface_t
> which appears a little earlier in phy.h

Hi,
I already have it prepared as part of v2, will send it later today.

Regards,
Robert
>
> >       PHY_INTERFACE_MODE_QSGMII,
> >       PHY_INTERFACE_MODE_TRGMII,
> >       PHY_INTERFACE_MODE_100BASEX,
>
> ...
diff mbox series

Patch

diff --git a/drivers/net/phy/phy-core.c b/drivers/net/phy/phy-core.c
index a64186dc53f8..966c93cbe616 100644
--- a/drivers/net/phy/phy-core.c
+++ b/drivers/net/phy/phy-core.c
@@ -142,6 +142,8 @@  int phy_interface_num_ports(phy_interface_t interface)
 	case PHY_INTERFACE_MODE_QSGMII:
 	case PHY_INTERFACE_MODE_QUSGMII:
 		return 4;
+	case PHY_INTERFACE_MODE_PSGMII:
+		return 5;
 	case PHY_INTERFACE_MODE_MAX:
 		WARN_ONCE(1, "PHY_INTERFACE_MODE_MAX isn't a valid interface mode");
 		return 0;
diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
index 4f1c8bb199e9..160bce608c34 100644
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -210,6 +210,7 @@  static int phylink_interface_max_speed(phy_interface_t interface)
 	case PHY_INTERFACE_MODE_RGMII_RXID:
 	case PHY_INTERFACE_MODE_RGMII_ID:
 	case PHY_INTERFACE_MODE_RGMII:
+	case PHY_INTERFACE_MODE_PSGMII:
 	case PHY_INTERFACE_MODE_QSGMII:
 	case PHY_INTERFACE_MODE_QUSGMII:
 	case PHY_INTERFACE_MODE_SGMII:
@@ -475,6 +476,7 @@  unsigned long phylink_get_capabilities(phy_interface_t interface,
 	case PHY_INTERFACE_MODE_RGMII_RXID:
 	case PHY_INTERFACE_MODE_RGMII_ID:
 	case PHY_INTERFACE_MODE_RGMII:
+	case PHY_INTERFACE_MODE_PSGMII:
 	case PHY_INTERFACE_MODE_QSGMII:
 	case PHY_INTERFACE_MODE_QUSGMII:
 	case PHY_INTERFACE_MODE_SGMII:
@@ -868,6 +870,7 @@  static int phylink_parse_mode(struct phylink *pl,
 
 		switch (pl->link_config.interface) {
 		case PHY_INTERFACE_MODE_SGMII:
+		case PHY_INTERFACE_MODE_PSGMII:
 		case PHY_INTERFACE_MODE_QSGMII:
 		case PHY_INTERFACE_MODE_QUSGMII:
 		case PHY_INTERFACE_MODE_RGMII:
diff --git a/include/linux/phy.h b/include/linux/phy.h
index ba08b0e60279..23756a10d40b 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -147,6 +147,7 @@  typedef enum {
 	PHY_INTERFACE_MODE_XGMII,
 	PHY_INTERFACE_MODE_XLGMII,
 	PHY_INTERFACE_MODE_MOCA,
+	PHY_INTERFACE_MODE_PSGMII,
 	PHY_INTERFACE_MODE_QSGMII,
 	PHY_INTERFACE_MODE_TRGMII,
 	PHY_INTERFACE_MODE_100BASEX,
@@ -254,6 +255,8 @@  static inline const char *phy_modes(phy_interface_t interface)
 		return "xlgmii";
 	case PHY_INTERFACE_MODE_MOCA:
 		return "moca";
+	case PHY_INTERFACE_MODE_PSGMII:
+		return "psgmii";
 	case PHY_INTERFACE_MODE_QSGMII:
 		return "qsgmii";
 	case PHY_INTERFACE_MODE_TRGMII: