| Message ID | 20230808082738.122804-2-krzysztof.kozlowski@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | clk: samsung: remove number of clocks from bindings | expand |
> -----Original Message----- > From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Sent: Tuesday, August 8, 2023 1:57 PM > To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>; Sylwester > Nawrocki <s.nawrocki@samsung.com>; Tomasz Figa > <tomasz.figa@gmail.com>; Chanwoo Choi <cw00.choi@samsung.com>; Alim > Akhtar <alim.akhtar@samsung.com>; Michael Turquette > <mturquette@baylibre.com>; Stephen Boyd <sboyd@kernel.org>; Rob > Herring <robh+dt@kernel.org>; Conor Dooley <conor+dt@kernel.org>; > linux-samsung-soc@vger.kernel.org; linux-clk@vger.kernel.org; linux-arm- > kernel@lists.infradead.org; linux-kernel@vger.kernel.org; > devicetree@vger.kernel.org > Subject: [PATCH 01/11] clk: samsung: exynos3250: do not define number of > clocks in bindings > > Number of clocks supported by Linux drivers might vary - sometimes we add > new clocks, not exposed previously. Therefore this number of clocks should > not be in the bindings, because otherwise we should not change it. > > Define number of clocks per each clock controller inside the driver directly. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > --- Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> > drivers/clk/samsung/clk-exynos3250.c | 11 ++++++++--- > 1 file changed, 8 insertions(+), 3 deletions(-) > > diff --git a/drivers/clk/samsung/clk-exynos3250.c b/drivers/clk/samsung/clk- > exynos3250.c > index 6cc65ccf867c..a02461667664 100644 > --- a/drivers/clk/samsung/clk-exynos3250.c > +++ b/drivers/clk/samsung/clk-exynos3250.c > @@ -100,6 +100,11 @@ > #define PWR_CTRL1_USE_CORE1_WFI (1 << 1) > #define PWR_CTRL1_USE_CORE0_WFI (1 << 0) > > +/* NOTE: Must be equal to the last clock ID increased by one */ > +#define CLKS_NR_MAIN (CLK_SCLK_MMC2 + > 1) > +#define CLKS_NR_DMC (CLK_DIV_DMCD + 1) > +#define CLKS_NR_ISP (CLK_SCLK_MPWM_ISP + 1) > + > static const unsigned long exynos3250_cmu_clk_regs[] __initconst = { > SRC_LEFTBUS, > DIV_LEFTBUS, > @@ -807,7 +812,7 @@ static const struct samsung_cmu_info cmu_info > __initconst = { > .nr_fixed_factor_clks = ARRAY_SIZE(fixed_factor_clks), > .cpu_clks = exynos3250_cpu_clks, > .nr_cpu_clks = ARRAY_SIZE(exynos3250_cpu_clks), > - .nr_clk_ids = CLK_NR_CLKS, > + .nr_clk_ids = CLKS_NR_MAIN, > .clk_regs = exynos3250_cmu_clk_regs, > .nr_clk_regs = ARRAY_SIZE(exynos3250_cmu_clk_regs), > }; > @@ -923,7 +928,7 @@ static const struct samsung_cmu_info dmc_cmu_info > __initconst = { > .nr_mux_clks = ARRAY_SIZE(dmc_mux_clks), > .div_clks = dmc_div_clks, > .nr_div_clks = ARRAY_SIZE(dmc_div_clks), > - .nr_clk_ids = NR_CLKS_DMC, > + .nr_clk_ids = CLKS_NR_DMC, > .clk_regs = exynos3250_cmu_dmc_clk_regs, > .nr_clk_regs = > ARRAY_SIZE(exynos3250_cmu_dmc_clk_regs), > }; > @@ -1067,7 +1072,7 @@ static const struct samsung_cmu_info isp_cmu_info > __initconst = { > .nr_div_clks = ARRAY_SIZE(isp_div_clks), > .gate_clks = isp_gate_clks, > .nr_gate_clks = ARRAY_SIZE(isp_gate_clks), > - .nr_clk_ids = NR_CLKS_ISP, > + .nr_clk_ids = CLKS_NR_ISP, > }; > > static int __init exynos3250_cmu_isp_probe(struct platform_device *pdev) > -- > 2.34.1
diff --git a/drivers/clk/samsung/clk-exynos3250.c b/drivers/clk/samsung/clk-exynos3250.c index 6cc65ccf867c..a02461667664 100644 --- a/drivers/clk/samsung/clk-exynos3250.c +++ b/drivers/clk/samsung/clk-exynos3250.c @@ -100,6 +100,11 @@ #define PWR_CTRL1_USE_CORE1_WFI (1 << 1) #define PWR_CTRL1_USE_CORE0_WFI (1 << 0) +/* NOTE: Must be equal to the last clock ID increased by one */ +#define CLKS_NR_MAIN (CLK_SCLK_MMC2 + 1) +#define CLKS_NR_DMC (CLK_DIV_DMCD + 1) +#define CLKS_NR_ISP (CLK_SCLK_MPWM_ISP + 1) + static const unsigned long exynos3250_cmu_clk_regs[] __initconst = { SRC_LEFTBUS, DIV_LEFTBUS, @@ -807,7 +812,7 @@ static const struct samsung_cmu_info cmu_info __initconst = { .nr_fixed_factor_clks = ARRAY_SIZE(fixed_factor_clks), .cpu_clks = exynos3250_cpu_clks, .nr_cpu_clks = ARRAY_SIZE(exynos3250_cpu_clks), - .nr_clk_ids = CLK_NR_CLKS, + .nr_clk_ids = CLKS_NR_MAIN, .clk_regs = exynos3250_cmu_clk_regs, .nr_clk_regs = ARRAY_SIZE(exynos3250_cmu_clk_regs), }; @@ -923,7 +928,7 @@ static const struct samsung_cmu_info dmc_cmu_info __initconst = { .nr_mux_clks = ARRAY_SIZE(dmc_mux_clks), .div_clks = dmc_div_clks, .nr_div_clks = ARRAY_SIZE(dmc_div_clks), - .nr_clk_ids = NR_CLKS_DMC, + .nr_clk_ids = CLKS_NR_DMC, .clk_regs = exynos3250_cmu_dmc_clk_regs, .nr_clk_regs = ARRAY_SIZE(exynos3250_cmu_dmc_clk_regs), }; @@ -1067,7 +1072,7 @@ static const struct samsung_cmu_info isp_cmu_info __initconst = { .nr_div_clks = ARRAY_SIZE(isp_div_clks), .gate_clks = isp_gate_clks, .nr_gate_clks = ARRAY_SIZE(isp_gate_clks), - .nr_clk_ids = NR_CLKS_ISP, + .nr_clk_ids = CLKS_NR_ISP, }; static int __init exynos3250_cmu_isp_probe(struct platform_device *pdev)
Number of clocks supported by Linux drivers might vary - sometimes we add new clocks, not exposed previously. Therefore this number of clocks should not be in the bindings, because otherwise we should not change it. Define number of clocks per each clock controller inside the driver directly. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- drivers/clk/samsung/clk-exynos3250.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-)