| Message ID | 20230809165007.1439-3-jszhang@kernel.org (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Netdev Maintainers |
| Headers | show |
| Series | net: stmmac: add new features to xgmac | expand |
On 8/9/23 18:49, Jisheng Zhang wrote: > The XGMAC_HWFEAT_GMIISEL bit also indicates whether support 10/100Mbps > or not. > The XGMAC_HWFEAT_HDSEL bit indicates whether support half duplex or > not. > The XGMAC_HWFEAT_ADDMACADRSEL bit indicates whether support Multiple > MAC address registers or not. > The XGMAC_HWFEAT_SMASEL bit indicates whether support SMA (MDIO) > Interface or not. > > Signed-off-by: Jisheng Zhang <jszhang@kernel.org> > --- > drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h | 3 +++ > drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c | 4 ++++ > 2 files changed, 7 insertions(+) > > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h > index 153321fe42c3..81cbb13a101d 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h > +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h > @@ -111,6 +111,7 @@ > #define XGMAC_LPI_TIMER_CTRL 0x000000d4 > #define XGMAC_HW_FEATURE0 0x0000011c > #define XGMAC_HWFEAT_SAVLANINS BIT(27) > +#define XGMAC_HWFEAT_ADDMACADRSEL GENMASK(22, 18) > #define XGMAC_HWFEAT_RXCOESEL BIT(16) > #define XGMAC_HWFEAT_TXCOESEL BIT(14) > #define XGMAC_HWFEAT_EEESEL BIT(13) > @@ -121,7 +122,9 @@ > #define XGMAC_HWFEAT_MMCSEL BIT(8) > #define XGMAC_HWFEAT_MGKSEL BIT(7) > #define XGMAC_HWFEAT_RWKSEL BIT(6) > +#define XGMAC_HWFEAT_SMASEL BIT(5) > #define XGMAC_HWFEAT_VLHASH BIT(4) > +#define XGMAC_HWFEAT_HDSEL BIT(3) > #define XGMAC_HWFEAT_GMIISEL BIT(1) > #define XGMAC_HW_FEATURE1 0x00000120 > #define XGMAC_HWFEAT_L3L4FNUM GENMASK(30, 27) > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c > index b09395f5edcb..b5ba4e0cca55 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c > +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c > @@ -406,6 +406,10 @@ static int dwxgmac2_get_hw_feature(void __iomem *ioaddr, > dma_cap->pmt_remote_wake_up = (hw_cap & XGMAC_HWFEAT_RWKSEL) >> 6; > dma_cap->vlhash = (hw_cap & XGMAC_HWFEAT_VLHASH) >> 4; > dma_cap->mbps_1000 = (hw_cap & XGMAC_HWFEAT_GMIISEL) >> 1; > + dma_cap->mbps_10_100 = (hw_cap & XGMAC_HWFEAT_GMIISEL) >> 1; > + dma_cap->half_duplex = (hw_cap & XGMAC_HWFEAT_HDSEL) >> 3; > + dma_cap->multi_addr = (hw_cap & XGMAC_HWFEAT_ADDMACADRSEL) >> 18; > + dma_cap->sma_mdio = (hw_cap & XGMAC_HWFEAT_SMASEL) >> 5; > > /* MAC HW feature 1 */ > hw_cap = readl(ioaddr + XGMAC_HW_FEATURE1); Acked-by: Alexandre TORGUE <alexandre.torgue@foss.st.com> Regards Alex
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h index 153321fe42c3..81cbb13a101d 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h @@ -111,6 +111,7 @@ #define XGMAC_LPI_TIMER_CTRL 0x000000d4 #define XGMAC_HW_FEATURE0 0x0000011c #define XGMAC_HWFEAT_SAVLANINS BIT(27) +#define XGMAC_HWFEAT_ADDMACADRSEL GENMASK(22, 18) #define XGMAC_HWFEAT_RXCOESEL BIT(16) #define XGMAC_HWFEAT_TXCOESEL BIT(14) #define XGMAC_HWFEAT_EEESEL BIT(13) @@ -121,7 +122,9 @@ #define XGMAC_HWFEAT_MMCSEL BIT(8) #define XGMAC_HWFEAT_MGKSEL BIT(7) #define XGMAC_HWFEAT_RWKSEL BIT(6) +#define XGMAC_HWFEAT_SMASEL BIT(5) #define XGMAC_HWFEAT_VLHASH BIT(4) +#define XGMAC_HWFEAT_HDSEL BIT(3) #define XGMAC_HWFEAT_GMIISEL BIT(1) #define XGMAC_HW_FEATURE1 0x00000120 #define XGMAC_HWFEAT_L3L4FNUM GENMASK(30, 27) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c index b09395f5edcb..b5ba4e0cca55 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c @@ -406,6 +406,10 @@ static int dwxgmac2_get_hw_feature(void __iomem *ioaddr, dma_cap->pmt_remote_wake_up = (hw_cap & XGMAC_HWFEAT_RWKSEL) >> 6; dma_cap->vlhash = (hw_cap & XGMAC_HWFEAT_VLHASH) >> 4; dma_cap->mbps_1000 = (hw_cap & XGMAC_HWFEAT_GMIISEL) >> 1; + dma_cap->mbps_10_100 = (hw_cap & XGMAC_HWFEAT_GMIISEL) >> 1; + dma_cap->half_duplex = (hw_cap & XGMAC_HWFEAT_HDSEL) >> 3; + dma_cap->multi_addr = (hw_cap & XGMAC_HWFEAT_ADDMACADRSEL) >> 18; + dma_cap->sma_mdio = (hw_cap & XGMAC_HWFEAT_SMASEL) >> 5; /* MAC HW feature 1 */ hw_cap = readl(ioaddr + XGMAC_HW_FEATURE1);
The XGMAC_HWFEAT_GMIISEL bit also indicates whether support 10/100Mbps or not. The XGMAC_HWFEAT_HDSEL bit indicates whether support half duplex or not. The XGMAC_HWFEAT_ADDMACADRSEL bit indicates whether support Multiple MAC address registers or not. The XGMAC_HWFEAT_SMASEL bit indicates whether support SMA (MDIO) Interface or not. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> --- drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h | 3 +++ drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c | 4 ++++ 2 files changed, 7 insertions(+)