| Message ID | 20230815003526.631-4-gurchetansingh@chromium.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | gfxstream + rutabaga_gfx | expand |
Reviewed-by: Emmanouil Pitsidianakis <manos.pitsidianakis@linaro.org> Tested-by: Emmanouil Pitsidianakis <manos.pitsidianakis@linaro.org> On Tue, 15 Aug 2023 03:35, Gurchetan Singh <gurchetansingh@chromium.org> wrote: >From: Gerd Hoffmann <kraxel@redhat.com> > >Use VIRTIO_GPU_SHM_ID_HOST_VISIBLE as id for virtio-gpu. > >Signed-off-by: Antonio Caggiano <antonio.caggiano@collabora.com> >Tested-by: Alyssa Ross <hi@alyssa.is> >Acked-by: Michael S. Tsirkin <mst@redhat.com> >--- > hw/display/virtio-gpu-pci.c | 14 ++++++++++++++ > hw/display/virtio-gpu.c | 1 + > hw/display/virtio-vga.c | 33 ++++++++++++++++++++++++--------- > include/hw/virtio/virtio-gpu.h | 5 +++++ > 4 files changed, 44 insertions(+), 9 deletions(-) > >diff --git a/hw/display/virtio-gpu-pci.c b/hw/display/virtio-gpu-pci.c >index 93f214ff58..da6a99f038 100644 >--- a/hw/display/virtio-gpu-pci.c >+++ b/hw/display/virtio-gpu-pci.c >@@ -33,6 +33,20 @@ static void virtio_gpu_pci_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp) > DeviceState *vdev = DEVICE(g); > int i; > >+ if (virtio_gpu_hostmem_enabled(g->conf)) { >+ vpci_dev->msix_bar_idx = 1; >+ vpci_dev->modern_mem_bar_idx = 2; >+ memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem", >+ g->conf.hostmem); >+ pci_register_bar(&vpci_dev->pci_dev, 4, >+ PCI_BASE_ADDRESS_SPACE_MEMORY | >+ PCI_BASE_ADDRESS_MEM_PREFETCH | >+ PCI_BASE_ADDRESS_MEM_TYPE_64, >+ &g->hostmem); >+ virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, >+ VIRTIO_GPU_SHM_ID_HOST_VISIBLE); >+ } >+ > virtio_pci_force_virtio_1(vpci_dev); > if (!qdev_realize(vdev, BUS(&vpci_dev->bus), errp)) { > return; >diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c >index bbd5c6561a..48ef0d9fad 100644 >--- a/hw/display/virtio-gpu.c >+++ b/hw/display/virtio-gpu.c >@@ -1509,6 +1509,7 @@ static Property virtio_gpu_properties[] = { > 256 * MiB), > DEFINE_PROP_BIT("blob", VirtIOGPU, parent_obj.conf.flags, > VIRTIO_GPU_FLAG_BLOB_ENABLED, false), >+ DEFINE_PROP_SIZE("hostmem", VirtIOGPU, parent_obj.conf.hostmem, 0), > DEFINE_PROP_END_OF_LIST(), > }; > >diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c >index e6fb0aa876..c8552ff760 100644 >--- a/hw/display/virtio-vga.c >+++ b/hw/display/virtio-vga.c >@@ -115,17 +115,32 @@ static void virtio_vga_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp) > pci_register_bar(&vpci_dev->pci_dev, 0, > PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram); > >- /* >- * Configure virtio bar and regions >- * >- * We use bar #2 for the mmio regions, to be compatible with stdvga. >- * virtio regions are moved to the end of bar #2, to make room for >- * the stdvga mmio registers at the start of bar #2. >- */ >- vpci_dev->modern_mem_bar_idx = 2; >- vpci_dev->msix_bar_idx = 4; > vpci_dev->modern_io_bar_idx = 5; > >+ if (!virtio_gpu_hostmem_enabled(g->conf)) { >+ /* >+ * Configure virtio bar and regions >+ * >+ * We use bar #2 for the mmio regions, to be compatible with stdvga. >+ * virtio regions are moved to the end of bar #2, to make room for >+ * the stdvga mmio registers at the start of bar #2. >+ */ >+ vpci_dev->modern_mem_bar_idx = 2; >+ vpci_dev->msix_bar_idx = 4; >+ } else { >+ vpci_dev->msix_bar_idx = 1; >+ vpci_dev->modern_mem_bar_idx = 2; >+ memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem", >+ g->conf.hostmem); >+ pci_register_bar(&vpci_dev->pci_dev, 4, >+ PCI_BASE_ADDRESS_SPACE_MEMORY | >+ PCI_BASE_ADDRESS_MEM_PREFETCH | >+ PCI_BASE_ADDRESS_MEM_TYPE_64, >+ &g->hostmem); >+ virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, >+ VIRTIO_GPU_SHM_ID_HOST_VISIBLE); >+ } >+ > if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) { > /* > * with page-per-vq=off there is no padding space we can use >diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h >index 8377c365ef..de4f624e94 100644 >--- a/include/hw/virtio/virtio-gpu.h >+++ b/include/hw/virtio/virtio-gpu.h >@@ -108,12 +108,15 @@ enum virtio_gpu_base_conf_flags { > (_cfg.flags & (1 << VIRTIO_GPU_FLAG_BLOB_ENABLED)) > #define virtio_gpu_context_init_enabled(_cfg) \ > (_cfg.flags & (1 << VIRTIO_GPU_FLAG_CONTEXT_INIT_ENABLED)) >+#define virtio_gpu_hostmem_enabled(_cfg) \ >+ (_cfg.hostmem > 0) > > struct virtio_gpu_base_conf { > uint32_t max_outputs; > uint32_t flags; > uint32_t xres; > uint32_t yres; >+ uint64_t hostmem; > }; > > struct virtio_gpu_ctrl_command { >@@ -137,6 +140,8 @@ struct VirtIOGPUBase { > int renderer_blocked; > int enable; > >+ MemoryRegion hostmem; >+ > struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS]; > > int enabled_output_bitmask; >-- >2.41.0.694.ge786442a9b-goog > >
diff --git a/hw/display/virtio-gpu-pci.c b/hw/display/virtio-gpu-pci.c index 93f214ff58..da6a99f038 100644 --- a/hw/display/virtio-gpu-pci.c +++ b/hw/display/virtio-gpu-pci.c @@ -33,6 +33,20 @@ static void virtio_gpu_pci_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp) DeviceState *vdev = DEVICE(g); int i; + if (virtio_gpu_hostmem_enabled(g->conf)) { + vpci_dev->msix_bar_idx = 1; + vpci_dev->modern_mem_bar_idx = 2; + memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem", + g->conf.hostmem); + pci_register_bar(&vpci_dev->pci_dev, 4, + PCI_BASE_ADDRESS_SPACE_MEMORY | + PCI_BASE_ADDRESS_MEM_PREFETCH | + PCI_BASE_ADDRESS_MEM_TYPE_64, + &g->hostmem); + virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, + VIRTIO_GPU_SHM_ID_HOST_VISIBLE); + } + virtio_pci_force_virtio_1(vpci_dev); if (!qdev_realize(vdev, BUS(&vpci_dev->bus), errp)) { return; diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index bbd5c6561a..48ef0d9fad 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -1509,6 +1509,7 @@ static Property virtio_gpu_properties[] = { 256 * MiB), DEFINE_PROP_BIT("blob", VirtIOGPU, parent_obj.conf.flags, VIRTIO_GPU_FLAG_BLOB_ENABLED, false), + DEFINE_PROP_SIZE("hostmem", VirtIOGPU, parent_obj.conf.hostmem, 0), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c index e6fb0aa876..c8552ff760 100644 --- a/hw/display/virtio-vga.c +++ b/hw/display/virtio-vga.c @@ -115,17 +115,32 @@ static void virtio_vga_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp) pci_register_bar(&vpci_dev->pci_dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &vga->vram); - /* - * Configure virtio bar and regions - * - * We use bar #2 for the mmio regions, to be compatible with stdvga. - * virtio regions are moved to the end of bar #2, to make room for - * the stdvga mmio registers at the start of bar #2. - */ - vpci_dev->modern_mem_bar_idx = 2; - vpci_dev->msix_bar_idx = 4; vpci_dev->modern_io_bar_idx = 5; + if (!virtio_gpu_hostmem_enabled(g->conf)) { + /* + * Configure virtio bar and regions + * + * We use bar #2 for the mmio regions, to be compatible with stdvga. + * virtio regions are moved to the end of bar #2, to make room for + * the stdvga mmio registers at the start of bar #2. + */ + vpci_dev->modern_mem_bar_idx = 2; + vpci_dev->msix_bar_idx = 4; + } else { + vpci_dev->msix_bar_idx = 1; + vpci_dev->modern_mem_bar_idx = 2; + memory_region_init(&g->hostmem, OBJECT(g), "virtio-gpu-hostmem", + g->conf.hostmem); + pci_register_bar(&vpci_dev->pci_dev, 4, + PCI_BASE_ADDRESS_SPACE_MEMORY | + PCI_BASE_ADDRESS_MEM_PREFETCH | + PCI_BASE_ADDRESS_MEM_TYPE_64, + &g->hostmem); + virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, + VIRTIO_GPU_SHM_ID_HOST_VISIBLE); + } + if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) { /* * with page-per-vq=off there is no padding space we can use diff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h index 8377c365ef..de4f624e94 100644 --- a/include/hw/virtio/virtio-gpu.h +++ b/include/hw/virtio/virtio-gpu.h @@ -108,12 +108,15 @@ enum virtio_gpu_base_conf_flags { (_cfg.flags & (1 << VIRTIO_GPU_FLAG_BLOB_ENABLED)) #define virtio_gpu_context_init_enabled(_cfg) \ (_cfg.flags & (1 << VIRTIO_GPU_FLAG_CONTEXT_INIT_ENABLED)) +#define virtio_gpu_hostmem_enabled(_cfg) \ + (_cfg.hostmem > 0) struct virtio_gpu_base_conf { uint32_t max_outputs; uint32_t flags; uint32_t xres; uint32_t yres; + uint64_t hostmem; }; struct virtio_gpu_ctrl_command { @@ -137,6 +140,8 @@ struct VirtIOGPUBase { int renderer_blocked; int enable; + MemoryRegion hostmem; + struct virtio_gpu_scanout scanout[VIRTIO_GPU_MAX_SCANOUTS]; int enabled_output_bitmask;