diff mbox series

[v6,2/6] perf test: Add a test for the new Arm CPU ID comparison behavior

Message ID 20230816114841.1679234-3-james.clark@arm.com (mailing list archive)
State New, archived
Headers show
Series perf vendor events arm64: Update N2 and V2 metrics and events using Arm telemetry repo | expand

Commit Message

James Clark Aug. 16, 2023, 11:47 a.m. UTC 
Now that variant and revision fields are taken into account the behavior
is slightly more complicated so add a test to ensure that this behaves
as expected.

Reviewed-by: John Garry <john.g.garry@oracle.com>
Signed-off-by: James Clark <james.clark@arm.com>
---
 tools/perf/arch/arm64/include/arch-tests.h |  3 ++
 tools/perf/arch/arm64/tests/Build          |  1 +
 tools/perf/arch/arm64/tests/arch-tests.c   |  4 +++
 tools/perf/arch/arm64/tests/cpuid-match.c  | 38 ++++++++++++++++++++++
 4 files changed, 46 insertions(+)
 create mode 100644 tools/perf/arch/arm64/tests/cpuid-match.c

Comments

Arnaldo Carvalho de Melo Aug. 16, 2023, 4:11 p.m. UTC | #1 
Em Wed, Aug 16, 2023 at 12:47:44PM +0100, James Clark escreveu:
> +++ b/tools/perf/arch/arm64/tests/cpuid-match.c
> @@ -0,0 +1,38 @@
> +// SPDX-License-Identifier: GPL-2.0
> +#include <linux/compiler.h>
> +
> +#include "arch-tests.h"
> +#include "tests/tests.h"
> +#include "util/header.h"
> +
> +int test__cpuid_match(struct test_suite *test __maybe_unused,
> +			     int subtest __maybe_unused)
> +{
> +	/* midr with no leading zeros matches */
> +	if (strcmp_cpuid_str("0x410fd0c0", "0x00000000410fd0c0"))
> +		return -1;
> +	/* Upper case matches */
> +	if (strcmp_cpuid_str("0x410fd0c0", "0x00000000410FD0C0"))
> +		return -1;
> +	/* r0p0 = r0p0 matches */
> +	if (strcmp_cpuid_str("0x00000000410fd480", "0x00000000410fd480"))
> +		return -1;
> +	/* r0p1 > r0p0 matches */
> +	if (strcmp_cpuid_str("0x00000000410fd480", "0x00000000410fd481"))
> +		return -1;
> +	/* r1p0 > r0p0 matches*/
> +	if (strcmp_cpuid_str("0x00000000410fd480", "0x00000000411fd480"))
> +		return -1;
> +	/* r0p0 < r0p1 doesn't match */
> +	if (!strcmp_cpuid_str("0x00000000410fd481", "0x00000000410fd480"))
> +		return -1;
> +	/* r0p0 < r1p0 doesn't match */
> +	if (!strcmp_cpuid_str("0x00000000411fd480", "0x00000000410fd480"))
> +		return -1;
> +	/* Different CPU doesn't match */
> +	if (!strcmp_cpuid_str("0x00000000410fd4c0", "0x00000000430f0af0"))
> +		return -1;
> +
> +	return 0;
> +}
> +
> -- 
> 2.34.1
> 
⬢[acme@toolbox perf-tools-next]$        git am ./v6_20230816_james_clark_perf_vendor_events_arm64_update_n2_and_v2_metrics_and_events_using_arm_telem.mbx
Applying: perf test: Add a test for the new Arm CPU ID comparison behavior
.git/rebase-apply/patch:93: new blank line at EOF.
+
warning: 1 line adds whitespace errors.
⬢[acme@toolbox perf-tools-next]$

I'm removing it
James Clark Aug. 17, 2023, 9:02 a.m. UTC | #2 
On 16/08/2023 17:11, Arnaldo Carvalho de Melo wrote:
> Em Wed, Aug 16, 2023 at 12:47:44PM +0100, James Clark escreveu:
>> +++ b/tools/perf/arch/arm64/tests/cpuid-match.c
>> @@ -0,0 +1,38 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +#include <linux/compiler.h>
>> +
>> +#include "arch-tests.h"
>> +#include "tests/tests.h"
>> +#include "util/header.h"
>> +
>> +int test__cpuid_match(struct test_suite *test __maybe_unused,
>> +			     int subtest __maybe_unused)
>> +{
>> +	/* midr with no leading zeros matches */
>> +	if (strcmp_cpuid_str("0x410fd0c0", "0x00000000410fd0c0"))
>> +		return -1;
>> +	/* Upper case matches */
>> +	if (strcmp_cpuid_str("0x410fd0c0", "0x00000000410FD0C0"))
>> +		return -1;
>> +	/* r0p0 = r0p0 matches */
>> +	if (strcmp_cpuid_str("0x00000000410fd480", "0x00000000410fd480"))
>> +		return -1;
>> +	/* r0p1 > r0p0 matches */
>> +	if (strcmp_cpuid_str("0x00000000410fd480", "0x00000000410fd481"))
>> +		return -1;
>> +	/* r1p0 > r0p0 matches*/
>> +	if (strcmp_cpuid_str("0x00000000410fd480", "0x00000000411fd480"))
>> +		return -1;
>> +	/* r0p0 < r0p1 doesn't match */
>> +	if (!strcmp_cpuid_str("0x00000000410fd481", "0x00000000410fd480"))
>> +		return -1;
>> +	/* r0p0 < r1p0 doesn't match */
>> +	if (!strcmp_cpuid_str("0x00000000411fd480", "0x00000000410fd480"))
>> +		return -1;
>> +	/* Different CPU doesn't match */
>> +	if (!strcmp_cpuid_str("0x00000000410fd4c0", "0x00000000430f0af0"))
>> +		return -1;
>> +
>> +	return 0;
>> +}
>> +
>> -- 
>> 2.34.1
>>
> ⬢[acme@toolbox perf-tools-next]$        git am ./v6_20230816_james_clark_perf_vendor_events_arm64_update_n2_and_v2_metrics_and_events_using_arm_telem.mbx
> Applying: perf test: Add a test for the new Arm CPU ID comparison behavior
> .git/rebase-apply/patch:93: new blank line at EOF.
> +
> warning: 1 line adds whitespace errors.
> ⬢[acme@toolbox perf-tools-next]$
> 
> I'm removing it

Interesting that checkpatch.pl doesn't see that. Thanks for the fix.
diff mbox series

Patch

diff --git a/tools/perf/arch/arm64/include/arch-tests.h b/tools/perf/arch/arm64/include/arch-tests.h
index 452b3d904521..474d7cf5afbd 100644
--- a/tools/perf/arch/arm64/include/arch-tests.h
+++ b/tools/perf/arch/arm64/include/arch-tests.h
@@ -2,6 +2,9 @@ 
 #ifndef ARCH_TESTS_H
 #define ARCH_TESTS_H
 
+struct test_suite;
+
+int test__cpuid_match(struct test_suite *test, int subtest);
 extern struct test_suite *arch_tests[];
 
 #endif
diff --git a/tools/perf/arch/arm64/tests/Build b/tools/perf/arch/arm64/tests/Build
index a61c06bdb757..e337c09e7f56 100644
--- a/tools/perf/arch/arm64/tests/Build
+++ b/tools/perf/arch/arm64/tests/Build
@@ -2,3 +2,4 @@  perf-y += regs_load.o
 perf-$(CONFIG_DWARF_UNWIND) += dwarf-unwind.o
 
 perf-y += arch-tests.o
+perf-y += cpuid-match.o
diff --git a/tools/perf/arch/arm64/tests/arch-tests.c b/tools/perf/arch/arm64/tests/arch-tests.c
index ad16b4f8f63e..74932e72c727 100644
--- a/tools/perf/arch/arm64/tests/arch-tests.c
+++ b/tools/perf/arch/arm64/tests/arch-tests.c
@@ -3,9 +3,13 @@ 
 #include "tests/tests.h"
 #include "arch-tests.h"
 
+
+DEFINE_SUITE("arm64 CPUID matching", cpuid_match);
+
 struct test_suite *arch_tests[] = {
 #ifdef HAVE_DWARF_UNWIND_SUPPORT
 	&suite__dwarf_unwind,
 #endif
+	&suite__cpuid_match,
 	NULL,
 };
diff --git a/tools/perf/arch/arm64/tests/cpuid-match.c b/tools/perf/arch/arm64/tests/cpuid-match.c
new file mode 100644
index 000000000000..af0871b54ae7
--- /dev/null
+++ b/tools/perf/arch/arm64/tests/cpuid-match.c
@@ -0,0 +1,38 @@ 
+// SPDX-License-Identifier: GPL-2.0
+#include <linux/compiler.h>
+
+#include "arch-tests.h"
+#include "tests/tests.h"
+#include "util/header.h"
+
+int test__cpuid_match(struct test_suite *test __maybe_unused,
+			     int subtest __maybe_unused)
+{
+	/* midr with no leading zeros matches */
+	if (strcmp_cpuid_str("0x410fd0c0", "0x00000000410fd0c0"))
+		return -1;
+	/* Upper case matches */
+	if (strcmp_cpuid_str("0x410fd0c0", "0x00000000410FD0C0"))
+		return -1;
+	/* r0p0 = r0p0 matches */
+	if (strcmp_cpuid_str("0x00000000410fd480", "0x00000000410fd480"))
+		return -1;
+	/* r0p1 > r0p0 matches */
+	if (strcmp_cpuid_str("0x00000000410fd480", "0x00000000410fd481"))
+		return -1;
+	/* r1p0 > r0p0 matches*/
+	if (strcmp_cpuid_str("0x00000000410fd480", "0x00000000411fd480"))
+		return -1;
+	/* r0p0 < r0p1 doesn't match */
+	if (!strcmp_cpuid_str("0x00000000410fd481", "0x00000000410fd480"))
+		return -1;
+	/* r0p0 < r1p0 doesn't match */
+	if (!strcmp_cpuid_str("0x00000000411fd480", "0x00000000410fd480"))
+		return -1;
+	/* Different CPU doesn't match */
+	if (!strcmp_cpuid_str("0x00000000410fd4c0", "0x00000000430f0af0"))
+		return -1;
+
+	return 0;
+}
+