| Message ID | 20230815152712.1760046-7-amitsinght@marvell.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | ARM: MPAM: add support for priority partitioning control | expand |
Hi, Amit, On 8/15/23 08:27, Amit Singh Tomar wrote: > At present, "schemata" file under resource control group reveals > information about Cache portion bitmap and Memory Bandwidth allocation. > With the introduction of priority partition control "schemata" is updated > to adopt priority value. > > Let's enable support for reading the priority values for "schemata" file. > > Signed-off-by: Amit Singh Tomar <amitsinght@marvell.com> > --- > drivers/platform/mpam/mpam_resctrl.c | 4 ++++ > fs/resctrl/ctrlmondata.c | 15 ++++++++++++--- > include/linux/resctrl.h | 4 ++++ > 3 files changed, 20 insertions(+), 3 deletions(-) > > diff --git a/drivers/platform/mpam/mpam_resctrl.c b/drivers/platform/mpam/mpam_resctrl.c > index cc843f1b0fb7..b491a0f897fd 100644 > --- a/drivers/platform/mpam/mpam_resctrl.c > +++ b/drivers/platform/mpam/mpam_resctrl.c > @@ -735,7 +735,11 @@ static int mpam_resctrl_resource_init(struct mpam_resctrl_res *res) > > if (has_ppart) { > r->priority_cap = true; > + if (class->props.dspri_wd > 0x10) > + class->props.dspri_wd = 0x10; > + > r->dspri_default_ctrl = BIT_MASK(class->props.dspri_wd) - 1; > + r->dspri_data_width = (class->props.dspri_wd + 3) / 4; > } > > /* > diff --git a/fs/resctrl/ctrlmondata.c b/fs/resctrl/ctrlmondata.c > index b19ac2509e38..8c8a4d09d22c 100644 > --- a/fs/resctrl/ctrlmondata.c > +++ b/fs/resctrl/ctrlmondata.c > @@ -379,7 +379,7 @@ static void show_doms(struct seq_file *s, struct resctrl_schema *schema, int clo > struct rdt_resource *r = schema->res; > struct rdt_domain *dom; > bool sep = false; > - u32 ctrl_val; > + u32 ctrl_val, dspri_ctrl_val; > > /* Walking r->domains, ensure it can't race with cpuhp */ > lockdep_assert_cpus_held(); > @@ -395,9 +395,18 @@ static void show_doms(struct seq_file *s, struct resctrl_schema *schema, int clo > ctrl_val = resctrl_arch_get_config(r, dom, closid, > schema->conf_type); > > - seq_printf(s, r->format_str, dom->id, max_data_width, > - ctrl_val); > + if (r->priority_cap) { > + r->dspri_show = true; > + dspri_ctrl_val = resctrl_arch_get_config(r, dom, closid, > + CDP_NONE); > + seq_printf(s, r->format_str, dom->id, max_data_width, ctrl_val, > + r->dspri_data_width, dspri_ctrl_val); Move r->dspri_show = false to here. > + } else > + seq_printf(s, r->format_str, dom->id, max_data_width, > + ctrl_val); > + > sep = true; > + r->dspri_show = false; dspri_show is irrelevant without priority_cap. > } > seq_puts(s, "\n"); > } > diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h > index d5b0661c0f70..d7100c330945 100644 > --- a/include/linux/resctrl.h > +++ b/include/linux/resctrl.h > @@ -199,12 +199,14 @@ struct resctrl_membw { > * @mon_capable: Is monitor feature available on this machine > * @priority_capable: Is priority partitioning feature available on this machine > * @dspri_store: > + * @dspri_show: flag to indicate downstream priority read > * @num_rmid: Number of RMIDs available > * @cache_level: Which cache level defines scope of this resource > * @cache: Cache allocation related data > * @membw: If the component has bandwidth controls, their properties. > * @domains: RCU list of all domains for this resource > * @name: Name to use in "schemata" file. > + * @dspri_data_width Character width of dspri value when displaying > * @data_width: Character width of data when displaying > * @default_ctrl: Specifies default cache cbm or memory B/W percent. > * @dspri_default_ctrl: Specifies default downstream priority value. > @@ -219,6 +221,7 @@ struct rdt_resource { > bool mon_capable; > bool priority_cap; > bool dspri_store; > + bool dspri_show; > int num_rmid; > int cache_level; > struct resctrl_cache cache; > @@ -226,6 +229,7 @@ struct rdt_resource { > struct list_head domains; > char *name; > int data_width; > + int dspri_data_width; > u32 default_ctrl; > u32 dspri_default_ctrl; > const char *format_str; Thanks. -Fenghua
diff --git a/drivers/platform/mpam/mpam_resctrl.c b/drivers/platform/mpam/mpam_resctrl.c index cc843f1b0fb7..b491a0f897fd 100644 --- a/drivers/platform/mpam/mpam_resctrl.c +++ b/drivers/platform/mpam/mpam_resctrl.c @@ -735,7 +735,11 @@ static int mpam_resctrl_resource_init(struct mpam_resctrl_res *res) if (has_ppart) { r->priority_cap = true; + if (class->props.dspri_wd > 0x10) + class->props.dspri_wd = 0x10; + r->dspri_default_ctrl = BIT_MASK(class->props.dspri_wd) - 1; + r->dspri_data_width = (class->props.dspri_wd + 3) / 4; } /* diff --git a/fs/resctrl/ctrlmondata.c b/fs/resctrl/ctrlmondata.c index b19ac2509e38..8c8a4d09d22c 100644 --- a/fs/resctrl/ctrlmondata.c +++ b/fs/resctrl/ctrlmondata.c @@ -379,7 +379,7 @@ static void show_doms(struct seq_file *s, struct resctrl_schema *schema, int clo struct rdt_resource *r = schema->res; struct rdt_domain *dom; bool sep = false; - u32 ctrl_val; + u32 ctrl_val, dspri_ctrl_val; /* Walking r->domains, ensure it can't race with cpuhp */ lockdep_assert_cpus_held(); @@ -395,9 +395,18 @@ static void show_doms(struct seq_file *s, struct resctrl_schema *schema, int clo ctrl_val = resctrl_arch_get_config(r, dom, closid, schema->conf_type); - seq_printf(s, r->format_str, dom->id, max_data_width, - ctrl_val); + if (r->priority_cap) { + r->dspri_show = true; + dspri_ctrl_val = resctrl_arch_get_config(r, dom, closid, + CDP_NONE); + seq_printf(s, r->format_str, dom->id, max_data_width, ctrl_val, + r->dspri_data_width, dspri_ctrl_val); + } else + seq_printf(s, r->format_str, dom->id, max_data_width, + ctrl_val); + sep = true; + r->dspri_show = false; } seq_puts(s, "\n"); } diff --git a/include/linux/resctrl.h b/include/linux/resctrl.h index d5b0661c0f70..d7100c330945 100644 --- a/include/linux/resctrl.h +++ b/include/linux/resctrl.h @@ -199,12 +199,14 @@ struct resctrl_membw { * @mon_capable: Is monitor feature available on this machine * @priority_capable: Is priority partitioning feature available on this machine * @dspri_store: + * @dspri_show: flag to indicate downstream priority read * @num_rmid: Number of RMIDs available * @cache_level: Which cache level defines scope of this resource * @cache: Cache allocation related data * @membw: If the component has bandwidth controls, their properties. * @domains: RCU list of all domains for this resource * @name: Name to use in "schemata" file. + * @dspri_data_width Character width of dspri value when displaying * @data_width: Character width of data when displaying * @default_ctrl: Specifies default cache cbm or memory B/W percent. * @dspri_default_ctrl: Specifies default downstream priority value. @@ -219,6 +221,7 @@ struct rdt_resource { bool mon_capable; bool priority_cap; bool dspri_store; + bool dspri_show; int num_rmid; int cache_level; struct resctrl_cache cache; @@ -226,6 +229,7 @@ struct rdt_resource { struct list_head domains; char *name; int data_width; + int dspri_data_width; u32 default_ctrl; u32 dspri_default_ctrl; const char *format_str;
At present, "schemata" file under resource control group reveals information about Cache portion bitmap and Memory Bandwidth allocation. With the introduction of priority partition control "schemata" is updated to adopt priority value. Let's enable support for reading the priority values for "schemata" file. Signed-off-by: Amit Singh Tomar <amitsinght@marvell.com> --- drivers/platform/mpam/mpam_resctrl.c | 4 ++++ fs/resctrl/ctrlmondata.c | 15 ++++++++++++--- include/linux/resctrl.h | 4 ++++ 3 files changed, 20 insertions(+), 3 deletions(-)