| Message ID | 8651570.alqRGMn8q6@phil (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [GIT,PULL] Rockchip clock changes for 6.6 #1 | expand |
Quoting Heiko Stuebner (2023-08-16 15:05:52) > Hi Mike, Stephen, > > please find below a pull-request with some small Rockchip stuff. > > Please pull. > > Thanks > Heiko > > > The following changes since commit 06c2afb862f9da8dc5efa4b6076a0e48c3fbaaa5: > > Linux 6.5-rc1 (2023-07-09 13:53:13 -0700) > > are available in the Git repository at: > > git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git tags/v6.6-rockchip-clk1 > > for you to fetch changes up to 5c7a71fd82350c2f5828a66a1f2f38306d61cbc7: > > clk: rockchip: rv1126: Add PD_VO clock tree (2023-08-10 23:14:06 +0200) > > ---------------------------------------------------------------- Thanks. Pulled into clk-next
Hi Mike, Stephen, please find below a pull-request with some small Rockchip stuff. Please pull. Thanks Heiko The following changes since commit 06c2afb862f9da8dc5efa4b6076a0e48c3fbaaa5: Linux 6.5-rc1 (2023-07-09 13:53:13 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git tags/v6.6-rockchip-clk1 for you to fetch changes up to 5c7a71fd82350c2f5828a66a1f2f38306d61cbc7: clk: rockchip: rv1126: Add PD_VO clock tree (2023-08-10 23:14:06 +0200) ---------------------------------------------------------------- PLL rates for rk3568 and the display clock tree for rv1126 which wasn't present before. 0# ---------------------------------------------------------------- Alibek Omarov (2): clk: rockchip: rk3568: Add PLL rate for 101MHz clk: rockchip: rk3568: Fix PLL rate setting for 78.75MHz Jagan Teki (1): clk: rockchip: rv1126: Add PD_VO clock tree drivers/clk/rockchip/clk-rk3568.c | 3 +- drivers/clk/rockchip/clk-rv1126.c | 59 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 61 insertions(+), 1 deletion(-)