diff mbox series

[RESEND,5/7] dt-bindings: mailbox: qcom: add one more clock provider for IPQ mailbox

Message ID 20230904-gpll_cleanup-v1-5-de2c448f1188@quicinc.com (mailing list archive)
State Awaiting Upstream, archived
Headers show
Series Add GPLL0 as clock provider for the Qualcomm's IPQ mailbox controller | expand

Commit Message

Kathiravan Thirumoorthy Sept. 6, 2023, 4:56 a.m. UTC 
Mailbox controller present in the IPQ SoCs takes the GPLL0 clock also as
an input. Document the same.

Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com>
---
 Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml | 2 ++
 1 file changed, 2 insertions(+)

Comments

Krzysztof Kozlowski Sept. 6, 2023, 8:06 a.m. UTC | #1 
On 06/09/2023 06:56, Kathiravan Thirumoorthy wrote:
> Mailbox controller present in the IPQ SoCs takes the GPLL0 clock also as
> an input. Document the same.
> 

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml
index d2e25ff6db7f..a38413f8d132 100644
--- a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml
+++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml
@@ -125,10 +125,12 @@  allOf:
           items:
             - description: primary pll parent of the clock driver
             - description: XO clock
+            - description: GCC GPLL0 clock source
         clock-names:
           items:
             - const: pll
             - const: xo
+            - const: gpll0
 
   - if:
       properties: