Message ID | 20230829042405.932523-1-qian.wen@intel.com (mailing list archive) |
---|---|
Headers | show |
Series | Fix overflow of the max number of IDs for logic processor and core | expand |
Kindly ping for any comments. Thanks, Qian On 8/29/2023 12:24 PM, Qian Wen wrote: > CPUID.1.EBX[23:16]: Maximum number of addressable IDs for logical > processors in this physical package. > CPUID.4:EAX[31:26]: Maximum number of addressable IDs for processor cores > in the physical package. > > The current qemu code doesn't limit the value written to these two fields. > If the guest has a huge number of cores, APs (application processor) will > fail to bring up and the wrong info will be reported. > According to HW behavior, setting max value written to CPUID.1.EBX[23:16] > to 255, and CPUID.4:EAX[31:26] to 63. > > --- > Changes v3 -> v4: > - Add "Reviewed-by" from Isaku and Xiaoyao. > - Rebase to the v8.1.0. > Changes v2 -> v3: > - Add patch 2. > - Revise the commit message and comment to be clearer. > - Using MIN() for limitation. > Changes v1 -> v2: > - Revise the commit message and comment to more clearer. > - Rebased to v8.1.0-rc2. > > Qian Wen (2): > target/i386: Avoid cpu number overflow in legacy topology > target/i386: Avoid overflow of the cache parameter enumerated by leaf > 4 > > target/i386/cpu.c | 8 +++++--- > 1 file changed, 5 insertions(+), 3 deletions(-) > > base-commit:f5fe7c17ac4e309e47e78f0f9761aebc8d2f2c81