Message ID | 20230910125726.1243652-2-festevam@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [v2,1/2] arm64: dts: imx93: Add the TMU interrupt | expand |
On 10/09/2023 14:57, Fabio Estevam wrote: > From: Fabio Estevam <festevam@denx.de> > > imx93 has a maximum of seven entries for fsl,tmu-range. > Then qoriq should have it constrained to 4 entries. Best regards, Krzysztof
Hi Krzysztof, On Mon, Sep 11, 2023 at 3:14 AM Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > On 10/09/2023 14:57, Fabio Estevam wrote: > > From: Fabio Estevam <festevam@denx.de> > > > > imx93 has a maximum of seven entries for fsl,tmu-range. > > > > Then qoriq should have it constrained to 4 entries. I just noticed that fsl-lx2160a.dtsi is also has a tmu compatible with two entries. Would it be OK to represent it like this? --- a/Documentation/devicetree/bindings/thermal/qoriq-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/qoriq-thermal.yaml @@ -33,7 +33,8 @@ properties: description: | The values to be programmed into TTRnCR, as specified by the SoC reference manual. The first cell is TTR0CR, the second is TTR1CR, etc. - maxItems: 4 + minItems: 2 + maxItems: 7
diff --git a/Documentation/devicetree/bindings/thermal/qoriq-thermal.yaml b/Documentation/devicetree/bindings/thermal/qoriq-thermal.yaml index 145744027234..d3734fc66f78 100644 --- a/Documentation/devicetree/bindings/thermal/qoriq-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/qoriq-thermal.yaml @@ -33,7 +33,8 @@ properties: description: | The values to be programmed into TTRnCR, as specified by the SoC reference manual. The first cell is TTR0CR, the second is TTR1CR, etc. - maxItems: 4 + minItems: 4 + maxItems: 7 fsl,tmu-calibration: $ref: /schemas/types.yaml#/definitions/uint32-matrix