diff mbox series

[v2,1/2] dt-bindings: imx8-jpeg: Add clocks entries

Message ID 20230908141238.642398-1-festevam@gmail.com (mailing list archive)
State New, archived
Headers show
Series [v2,1/2] dt-bindings: imx8-jpeg: Add clocks entries | expand

Commit Message

Fabio Estevam Sept. 8, 2023, 2:12 p.m. UTC
From: Fabio Estevam <festevam@denx.de>

The JPEG decoder/encoder present in iMX8QXP and iMX8QM SoCs need
the PER and IPG clocks to be functional, so add the clock entries.

This also fixes the following schema warning: 

imx8qm-apalis-eval.dtb: jpegdec@58400000: 'assigned-clock-rates', 'assigned-clocks', 'clock-names', 'clocks' do not match any of the regexes: 'pinctrl-[0-9]+'
	from schema $id: http://devicetree.org/schemas/media/nxp,imx8-jpeg.yaml#

Signed-off-by: Fabio Estevam <festevam@denx.de>
---
Changes since v1:
- None

 .../bindings/media/nxp,imx8-jpeg.yaml           | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

Comments

Rob Herring (Arm) Sept. 11, 2023, 3:03 p.m. UTC | #1
On Fri, Sep 08, 2023 at 11:12:37AM -0300, Fabio Estevam wrote:
> From: Fabio Estevam <festevam@denx.de>
> 
> The JPEG decoder/encoder present in iMX8QXP and iMX8QM SoCs need
> the PER and IPG clocks to be functional, so add the clock entries.
> 
> This also fixes the following schema warning: 
> 
> imx8qm-apalis-eval.dtb: jpegdec@58400000: 'assigned-clock-rates', 'assigned-clocks', 'clock-names', 'clocks' do not match any of the regexes: 'pinctrl-[0-9]+'
> 	from schema $id: http://devicetree.org/schemas/media/nxp,imx8-jpeg.yaml#

See the prior patch and discussion[1].

Rob

[1] https://lore.kernel.org/all/20230724122101.2903318-3-alexander.stein@ew.tq-group.com/
Krzysztof Kozlowski Sept. 12, 2023, 8:32 a.m. UTC | #2
On 08/09/2023 16:12, Fabio Estevam wrote:
> From: Fabio Estevam <festevam@denx.de>
> 
> The JPEG decoder/encoder present in iMX8QXP and iMX8QM SoCs need

Subject: media: dt-bindings: nxp,imx8-jpeg:


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof
Krzysztof Kozlowski Sept. 12, 2023, 8:34 a.m. UTC | #3
On 12/09/2023 10:32, Krzysztof Kozlowski wrote:
> On 08/09/2023 16:12, Fabio Estevam wrote:
>> From: Fabio Estevam <festevam@denx.de>
>>
>> The JPEG decoder/encoder present in iMX8QXP and iMX8QM SoCs need
> 
> Subject: media: dt-bindings: nxp,imx8-jpeg:
> 
> 
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Now I spotted Rob's answer, so obviously:
Un-reviewed

Best regards,
Krzysztof
Mirela Rabulea Sept. 12, 2023, 3:55 p.m. UTC | #4
> -----Original Message-----
> From: Fabio Estevam <festevam@gmail.com>
> Sent: Friday, September 8, 2023 5:13 PM
> To: shawnguo@kernel.org
> Cc: robh+dt@kernel.org; krzysztof.kozlowski+dt@linaro.org;
> conor+dt@kernel.org; Mirela Rabulea <mirela.rabulea@nxp.com>;
> devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Fabio
> Estevam <festevam@denx.de>
> Subject: [PATCH v2 1/2] dt-bindings: imx8-jpeg: Add clocks entries
> 
> From: Fabio Estevam <festevam@denx.de>
> 
> The JPEG decoder/encoder present in iMX8QXP and iMX8QM SoCs need the PER
> and IPG clocks to be functional, so add the clock entries.
> 
> This also fixes the following schema warning:
> 
> imx8qm-apalis-eval.dtb: jpegdec@58400000: 'assigned-clock-rates', 'assigned-
> clocks', 'clock-names', 'clocks' do not match any of the regexes: 'pinctrl-[0-9]+'
>         from schema $id:
> https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetre
> e.org%2Fschemas%2Fmedia%2Fnxp%2Cimx8-
> jpeg.yaml%23&data=05%7C01%7Cmirela.rabulea%40nxp.com%7C69f66da1744
> 7425f2da308dbb075acd4%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0
> %7C638297791671220834%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAw
> MDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7
> C&sdata=YoF9rQPIu2JP3nqXnQN5POXHhB5NP%2Fk%2FnAreCNk4yNA%3D&rese
> rved=0
> 
> Signed-off-by: Fabio Estevam <festevam@denx.de>
> ---
> Changes since v1:
> - None
> 
>  .../bindings/media/nxp,imx8-jpeg.yaml           | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml
> b/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml
> index 3d9d1db37040..7899e17aff3a 100644
> --- a/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml
> +++ b/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml
> @@ -31,6 +31,14 @@ properties:
>    reg:
>      maxItems: 1
> 
> +  clocks:
> +    maxItems: 2
> +
> +  clock-names:
> +    items:
> +      - const: per
> +      - const: ipg
> +
>    interrupts:
>      description: |
>        There are 4 slots available in the IP, which the driver may use @@ -49,6
> +57,8 @@ properties:
>  required:
>    - compatible
>    - reg
> +  - clocks
> +  - clock-names

Hi,
As Rob Herring pointed out, there is already a similar patch sent before by Alexander Stein, but Fabio's patch is somewhat more complete, as it makes the "clocks" required, and also updates the example. The errors mentioned in the commit description are indeed fixed.

But I think the "clock-names" should not be required, as the driver does not need the clock names. Other than that, I agree with this patch.

Thanks Alexander & Fabio!


>    - interrupts
>    - power-domains
> 
> @@ -56,12 +66,16 @@ additionalProperties: false
> 
>  examples:
>    - |
> +    #include <dt-bindings/clock/imx8-lpcg.h>
>      #include <dt-bindings/interrupt-controller/arm-gic.h>
>      #include <dt-bindings/firmware/imx/rsrc.h>
> 
>      jpegdec: jpegdec@58400000 {
>          compatible = "nxp,imx8qxp-jpgdec";
>          reg = <0x58400000 0x00050000 >;
> +        clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>,
> +                 <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>;
> +        clock-names = "per", "ipg";
>          interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
>                       <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
>                       <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, @@ -76,6 +90,9 @@
> examples:
>      jpegenc: jpegenc@58450000 {
>          compatible = "nxp,imx8qm-jpgenc", "nxp,imx8qxp-jpgenc";
>          reg = <0x58450000 0x00050000 >;
> +        clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>,
> +                 <&img_jpeg__lpcg IMX_LPCG_CLK_4>;
> +        clock-names = "per", "ipg";
>          interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
>                       <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
>                       <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
> --
> 2.34.1
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml b/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml
index 3d9d1db37040..7899e17aff3a 100644
--- a/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml
+++ b/Documentation/devicetree/bindings/media/nxp,imx8-jpeg.yaml
@@ -31,6 +31,14 @@  properties:
   reg:
     maxItems: 1
 
+  clocks:
+    maxItems: 2
+
+  clock-names:
+    items:
+      - const: per
+      - const: ipg
+
   interrupts:
     description: |
       There are 4 slots available in the IP, which the driver may use
@@ -49,6 +57,8 @@  properties:
 required:
   - compatible
   - reg
+  - clocks
+  - clock-names
   - interrupts
   - power-domains
 
@@ -56,12 +66,16 @@  additionalProperties: false
 
 examples:
   - |
+    #include <dt-bindings/clock/imx8-lpcg.h>
     #include <dt-bindings/interrupt-controller/arm-gic.h>
     #include <dt-bindings/firmware/imx/rsrc.h>
 
     jpegdec: jpegdec@58400000 {
         compatible = "nxp,imx8qxp-jpgdec";
         reg = <0x58400000 0x00050000 >;
+        clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>,
+                 <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>;
+        clock-names = "per", "ipg";
         interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
@@ -76,6 +90,9 @@  examples:
     jpegenc: jpegenc@58450000 {
         compatible = "nxp,imx8qm-jpgenc", "nxp,imx8qxp-jpgenc";
         reg = <0x58450000 0x00050000 >;
+        clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>,
+                 <&img_jpeg__lpcg IMX_LPCG_CLK_4>;
+        clock-names = "per", "ipg";
         interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
                      <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
                      <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,