| Message ID | 20230821144151.207339-1-xingyu.wu@starfivetech.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Add I2S support for the StarFive JH7110 SoC | expand |
From: Conor Dooley <conor.dooley@microchip.com> On Mon, 21 Aug 2023 22:41:46 +0800, Xingyu Wu wrote: > This patch series adds I2S support for the StarFive JH7110 RISC-V > SoC based on Designware I2S controller. There has three I2S channels > (RX/TX0/TX1) on the JH7110 SoC, one of which is for record(RX) and > two for playback(TX). > > The first patch adds support for the StarFive JH7110 SoC in the > Designware I2S bindings. > The second patch adds the ops to get data from platform bus in the > I2S driver. > The third patch adds support for the StarFive JH7110 SoC in > the Designware I2S driver. > The fourth patch fixes the name of I2STX1 pinmux. > The last patch adds device node of I2S RX/TX0/TX1 in JH7110 dts. > > [...] Applied to riscv-dt-for-next, thanks! [4/5] riscv: dts: starfive: pinfunc: Fix the pins name of I2STX1 https://git.kernel.org/conor/c/4e1abae5688a [5/5] riscv: dts: starfive: Add the nodes and pins of I2Srx/I2Stx0/I2Stx1 https://git.kernel.org/conor/c/92cfc35838b2 Thanks, Conor.
This patch series adds I2S support for the StarFive JH7110 RISC-V SoC based on Designware I2S controller. There has three I2S channels (RX/TX0/TX1) on the JH7110 SoC, one of which is for record(RX) and two for playback(TX). The first patch adds support for the StarFive JH7110 SoC in the Designware I2S bindings. The second patch adds the ops to get data from platform bus in the I2S driver. The third patch adds support for the StarFive JH7110 SoC in the Designware I2S driver. The fourth patch fixes the name of I2STX1 pinmux. The last patch adds device node of I2S RX/TX0/TX1 in JH7110 dts. This patch series is based on Linux-next(20230818) which is merge clock, syscon and dma nodes for the StarFive JH7110 SoC. The series has been tested and works normally on the VisionFive 2 board by plugging an audio expansion board. Changes since v1: - Added the maxItems of clocks, clock-names and resets on each I2S controllers in the binding. - Dropped the useless settings about dma bus width in the I2S driver. - Used the 'i2s@' instead of 'i2stx@' or 'i2srx@' in the JH7110 dts. v1: https://lore.kernel.org/all/20230802084301.134122-1-xingyu.wu@starfivetech.com/ Xingyu Wu (5): ASoC: dt-bindings: snps,designware-i2s: Add StarFive JH7110 SoC support ASoC: dwc: Use ops to get platform data ASoC: dwc: i2s: Add StarFive JH7110 SoC support riscv: dts: starfive: pinfunc: Fix the pins name of I2STX1 riscv: dts: starfive: Add the nodes and pins of I2Srx/I2Stx0/I2Stx1 .../bindings/sound/snps,designware-i2s.yaml | 108 ++++++- arch/riscv/boot/dts/starfive/jh7110-pinfunc.h | 4 +- .../jh7110-starfive-visionfive-2.dtsi | 58 ++++ arch/riscv/boot/dts/starfive/jh7110.dtsi | 65 ++++ include/sound/designware_i2s.h | 3 + sound/soc/dwc/dwc-i2s.c | 306 ++++++++++++++++-- sound/soc/dwc/local.h | 1 + 7 files changed, 518 insertions(+), 27 deletions(-)