| Message ID | 20230921060913.721336-3-danishanwar@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add AM65x ICSSG Ethernet support | expand |
> + /* Dual Ethernet application node on PRU-ICSSG2 */
How relevant is "Dual Ethernet" here? You are talking of adding
switchdev support, and runtime swapping the application. All these
properties should be valid for the switch application as well?
In fact, you are describing hardware here, so the application should
not actually matter.
So maybe this comment should be:
Ethernet node on PRU-ICSSG2
Andrew
On 9/21/23 1:09 AM, MD Danish Anwar wrote: > ICSSG2 provides dual Gigabit Ethernet support. > > For support SR2.0 ICSSG Ethernet firmware: > - provide different firmware blobs and use TX_PRU. > - IEP0 is used as PTP Hardware Clock and can only be used for one port. > - TX timestamp notification comes via INTC interrupt. > > Signed-off-by: MD Danish Anwar <danishanwar@ti.com> > --- > arch/arm64/boot/dts/ti/Makefile | 4 +- > ...se-board.dts => k3-am654-common-board.dts} | 0 > arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso | 145 ++++++++++++++++++ > 3 files changed, 148 insertions(+), 1 deletion(-) > rename arch/arm64/boot/dts/ti/{k3-am654-base-board.dts => k3-am654-common-board.dts} (100%) > create mode 100644 arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso > > diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile > index e7b8e2e7f083..85c91f5e832e 100644 > --- a/arch/arm64/boot/dts/ti/Makefile > +++ b/arch/arm64/boot/dts/ti/Makefile > @@ -42,12 +42,14 @@ dtb-$(CONFIG_ARCH_K3) += k3-am642-tqma64xxl-mbax4xxl-sdcard.dtb > dtb-$(CONFIG_ARCH_K3) += k3-am642-tqma64xxl-mbax4xxl-wlan.dtb > > # Boards with AM65x SoC > -k3-am654-gp-evm-dtbs := k3-am654-base-board.dtb k3-am654-base-board-rocktech-rk101-panel.dtbo > +k3-am654-gp-evm-dtbs := k3-am654-common-board.dtb k3-am654-base-board-rocktech-rk101-panel.dtbo Should the k3-am654-gp-evm.dtb not also have this icssg2 support? Does it work to keep this line like before or is there some conflict having both enabled? Andrew > +k3-am654-base-board-dtbs := k3-am654-common-board.dtb k3-am654-icssg2.dtbo > dtb-$(CONFIG_ARCH_K3) += k3-am6528-iot2050-basic.dtb > dtb-$(CONFIG_ARCH_K3) += k3-am6528-iot2050-basic-pg2.dtb > dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced.dtb > dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced-m2.dtb > dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced-pg2.dtb > +dtb-$(CONFIG_ARCH_K3) += k3-am654-common-board.dtb > dtb-$(CONFIG_ARCH_K3) += k3-am654-base-board.dtb > dtb-$(CONFIG_ARCH_K3) += k3-am654-gp-evm.dtb > > diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-common-board.dts > similarity index 100% > rename from arch/arm64/boot/dts/ti/k3-am654-base-board.dts > rename to arch/arm64/boot/dts/ti/k3-am654-common-board.dts > diff --git a/arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso b/arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso > new file mode 100644 > index 000000000000..e91c20947d05 > --- /dev/null > +++ b/arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso > @@ -0,0 +1,145 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/** > + * DT overlay for IDK application board on AM654 EVM > + * > + * Copyright (C) 2018-2023 Texas Instruments Incorporated - https://www.ti.com/ > + */ > + > +/dts-v1/; > +/plugin/; > + > +#include <dt-bindings/net/ti-dp83867.h> > +#include "k3-pinctrl.h" > + > +&{/} { > + aliases { > + ethernet1 = &icssg2_emac0; > + ethernet2 = &icssg2_emac1; > + }; > + > + /* Dual Ethernet application node on PRU-ICSSG2 */ > + icssg2_eth: icssg2-eth { > + compatible = "ti,am654-icssg-prueth"; > + pinctrl-names = "default"; > + pinctrl-0 = <&icssg2_rgmii_pins_default>; > + sram = <&msmc_ram>; > + ti,prus = <&pru2_0>, <&rtu2_0>, <&tx_pru2_0>, > + <&pru2_1>, <&rtu2_1>, <&tx_pru2_1>; > + firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf", > + "ti-pruss/am65x-sr2-rtu0-prueth-fw.elf", > + "ti-pruss/am65x-sr2-txpru0-prueth-fw.elf", > + "ti-pruss/am65x-sr2-pru1-prueth-fw.elf", > + "ti-pruss/am65x-sr2-rtu1-prueth-fw.elf", > + "ti-pruss/am65x-sr2-txpru1-prueth-fw.elf"; > + > + ti,pruss-gp-mux-sel = <2>, /* MII mode */ > + <2>, > + <2>, > + <2>, /* MII mode */ > + <2>, > + <2>; > + > + ti,mii-g-rt = <&icssg2_mii_g_rt>; > + ti,mii-rt = <&icssg2_mii_rt>; > + ti,iep = <&icssg2_iep0>, <&icssg2_iep1>; > + > + interrupt-parent = <&icssg2_intc>; > + interrupts = <24 0 2>, <25 1 3>; > + interrupt-names = "tx_ts0", "tx_ts1"; > + > + dmas = <&main_udmap 0xc300>, /* egress slice 0 */ > + <&main_udmap 0xc301>, /* egress slice 0 */ > + <&main_udmap 0xc302>, /* egress slice 0 */ > + <&main_udmap 0xc303>, /* egress slice 0 */ > + <&main_udmap 0xc304>, /* egress slice 1 */ > + <&main_udmap 0xc305>, /* egress slice 1 */ > + <&main_udmap 0xc306>, /* egress slice 1 */ > + <&main_udmap 0xc307>, /* egress slice 1 */ > + <&main_udmap 0x4300>, /* ingress slice 0 */ > + <&main_udmap 0x4301>; /* ingress slice 1 */ > + > + dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3", > + "tx1-0", "tx1-1", "tx1-2", "tx1-3", > + "rx0", "rx1"; > + ethernet-ports { > + #address-cells = <1>; > + #size-cells = <0>; > + icssg2_emac0: port@0 { > + reg = <0>; > + phy-handle = <&icssg2_phy0>; > + phy-mode = "rgmii-id"; > + ti,syscon-rgmii-delay = <&scm_conf 0x4120>; > + /* Filled in by bootloader */ > + local-mac-address = [00 00 00 00 00 00]; > + }; > + icssg2_emac1: port@1 { > + reg = <1>; > + phy-handle = <&icssg2_phy1>; > + phy-mode = "rgmii-id"; > + ti,syscon-rgmii-delay = <&scm_conf 0x4124>; > + /* Filled in by bootloader */ > + local-mac-address = [00 00 00 00 00 00]; > + }; > + }; > + }; > +}; > + > +&main_pmx0 { > + > + icssg2_mdio_pins_default: icssg2-mdio-default-pins { > + pinctrl-single,pins = < > + AM65X_IOPAD(0x0094, PIN_INPUT, 2) /* (AC19) PRG2_PRU0_GPO7.PRG2_MDIO0_MDIO */ > + AM65X_IOPAD(0x00c8, PIN_OUTPUT, 2) /* (AE15) PRG2_PRU1_GPO7.PRG2_MDIO0_MDC */ > + >; > + }; > + > + icssg2_rgmii_pins_default: icssg2-rgmii-default-pins { > + pinctrl-single,pins = < > + AM65X_IOPAD(0x00ac, PIN_INPUT, 2) /* (AH15) PRG2_PRU1_GPO0.PRG2_RGMII2_RD0 */ > + AM65X_IOPAD(0x00b0, PIN_INPUT, 2) /* (AC16) PRG2_PRU1_GPO1.PRG2_RGMII2_RD1 */ > + AM65X_IOPAD(0x00b4, PIN_INPUT, 2) /* (AD17) PRG2_PRU1_GPO2.PRG2_RGMII2_RD2 */ > + AM65X_IOPAD(0x00b8, PIN_INPUT, 2) /* (AH14) PRG2_PRU1_GPO3.PRG2_RGMII2_RD3 */ > + AM65X_IOPAD(0x00cc, PIN_OUTPUT, 2) /* (AD15) PRG2_PRU1_GPO8.PRG2_RGMII2_TD0 */ > + AM65X_IOPAD(0x00d0, PIN_OUTPUT, 2) /* (AF14) PRG2_PRU1_GPO9.PRG2_RGMII2_TD1 */ > + AM65X_IOPAD(0x00d4, PIN_OUTPUT, 2) /* (AC15) PRG2_PRU1_GPO10.PRG2_RGMII2_TD2 */ > + AM65X_IOPAD(0x00d8, PIN_OUTPUT, 2) /* (AD14) PRG2_PRU1_GPO11.PRG2_RGMII2_TD3 */ > + AM65X_IOPAD(0x00dc, PIN_INPUT, 2) /* (AE14) PRG2_PRU1_GPO16.PRG2_RGMII2_TXC */ > + AM65X_IOPAD(0x00c4, PIN_OUTPUT, 2) /* (AC17) PRG2_PRU1_GPO6.PRG2_RGMII2_TX_CTL */ > + AM65X_IOPAD(0x00c0, PIN_INPUT, 2) /* (AG15) PRG2_PRU1_GPO5.PRG2_RGMII2_RXC */ > + AM65X_IOPAD(0x00bc, PIN_INPUT, 2) /* (AG14) PRG2_PRU1_GPO4.PRG2_RGMII2_RX_CTL */ > + > + AM65X_IOPAD(0x0078, PIN_INPUT, 2) /* (AF18) PRG2_PRU0_GPO0.PRG2_RGMII1_RD0 */ > + AM65X_IOPAD(0x007c, PIN_INPUT, 2) /* (AE18) PRG2_PRU0_GPO1.PRG2_RGMII1_RD1 */ > + AM65X_IOPAD(0x0080, PIN_INPUT, 2) /* (AH17) PRG2_PRU0_GPO2.PRG2_RGMII1_RD2 */ > + AM65X_IOPAD(0x0084, PIN_INPUT, 2) /* (AG18) PRG2_PRU0_GPO3.PRG2_RGMII1_RD3 */ > + AM65X_IOPAD(0x0098, PIN_OUTPUT, 2) /* (AH16) PRG2_PRU0_GPO8.PRG2_RGMII1_TD0 */ > + AM65X_IOPAD(0x009c, PIN_OUTPUT, 2) /* (AG16) PRG2_PRU0_GPO9.PRG2_RGMII1_TD1 */ > + AM65X_IOPAD(0x00a0, PIN_OUTPUT, 2) /* (AF16) PRG2_PRU0_GPO10.PRG2_RGMII1_TD2 */ > + AM65X_IOPAD(0x00a4, PIN_OUTPUT, 2) /* (AE16) PRG2_PRU0_GPO11.PRG2_RGMII1_TD3 */ > + AM65X_IOPAD(0x00a8, PIN_INPUT, 2) /* (AD16) PRG2_PRU0_GPO16.PRG2_RGMII1_TXC */ > + AM65X_IOPAD(0x0090, PIN_OUTPUT, 2) /* (AE17) PRG2_PRU0_GPO6.PRG2_RGMII1_TX_CTL */ > + AM65X_IOPAD(0x008c, PIN_INPUT, 2) /* (AF17) PRG2_PRU0_GPO5.PRG2_RGMII1_RXC */ > + AM65X_IOPAD(0x0088, PIN_INPUT, 2) /* (AG17) PRG2_PRU0_GPO4.PRG2_RGMII1_RX_CTL */ > + >; > + }; > +}; > + > +&icssg2_mdio { > + status = "okay"; > + pinctrl-names = "default"; > + pinctrl-0 = <&icssg2_mdio_pins_default>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + icssg2_phy0: ethernet-phy@0 { > + reg = <0>; > + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; > + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; > + }; > + > + icssg2_phy1: ethernet-phy@3 { > + reg = <3>; > + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; > + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; > + }; > +};
On 21/09/23 22:57, Andrew Davis wrote: > On 9/21/23 1:09 AM, MD Danish Anwar wrote: >> ICSSG2 provides dual Gigabit Ethernet support. >> >> For support SR2.0 ICSSG Ethernet firmware: >> - provide different firmware blobs and use TX_PRU. >> - IEP0 is used as PTP Hardware Clock and can only be used for one port. >> - TX timestamp notification comes via INTC interrupt. >> >> Signed-off-by: MD Danish Anwar <danishanwar@ti.com> >> --- >> arch/arm64/boot/dts/ti/Makefile | 4 +- >> ...se-board.dts => k3-am654-common-board.dts} | 0 >> arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso | 145 ++++++++++++++++++ >> 3 files changed, 148 insertions(+), 1 deletion(-) >> rename arch/arm64/boot/dts/ti/{k3-am654-base-board.dts => >> k3-am654-common-board.dts} (100%) >> create mode 100644 arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso >> >> diff --git a/arch/arm64/boot/dts/ti/Makefile >> b/arch/arm64/boot/dts/ti/Makefile >> index e7b8e2e7f083..85c91f5e832e 100644 >> --- a/arch/arm64/boot/dts/ti/Makefile >> +++ b/arch/arm64/boot/dts/ti/Makefile >> @@ -42,12 +42,14 @@ dtb-$(CONFIG_ARCH_K3) += >> k3-am642-tqma64xxl-mbax4xxl-sdcard.dtb >> dtb-$(CONFIG_ARCH_K3) += k3-am642-tqma64xxl-mbax4xxl-wlan.dtb >> # Boards with AM65x SoC >> -k3-am654-gp-evm-dtbs := k3-am654-base-board.dtb >> k3-am654-base-board-rocktech-rk101-panel.dtbo >> +k3-am654-gp-evm-dtbs := k3-am654-common-board.dtb >> k3-am654-base-board-rocktech-rk101-panel.dtbo > > Should the k3-am654-gp-evm.dtb not also have this icssg2 support? Does > it work > to keep this line like before or is there some conflict having both > enabled? > I have not tested this dtb (k3-am654-gp-evm.dtb). So just to be on the safe side I kept gp-evm.dtb as it was. Ideally gp-evm.dtb should have icssg2 support as well. But I haven't tested the combination of base-board + icssg dtbo + rockteck dtbo. That is why I kept gp-evm dtb as it was. Anyways, for ICSSG2's use case only k3-am654-base-board.dtb is used so I think it's ok to leave k3-am654-gp-evm.dtb to as it was. > Andrew > >> +k3-am654-base-board-dtbs := k3-am654-common-board.dtb >> k3-am654-icssg2.dtbo >> dtb-$(CONFIG_ARCH_K3) += k3-am6528-iot2050-basic.dtb >> dtb-$(CONFIG_ARCH_K3) += k3-am6528-iot2050-basic-pg2.dtb >> dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced.dtb >> dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced-m2.dtb >> dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced-pg2.dtb >> +dtb-$(CONFIG_ARCH_K3) += k3-am654-common-board.dtb >> dtb-$(CONFIG_ARCH_K3) += k3-am654-base-board.dtb >> dtb-$(CONFIG_ARCH_K3) += k3-am654-gp-evm.dtb >> diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts >> b/arch/arm64/boot/dts/ti/k3-am654-common-board.dts >> similarity index 100% >> rename from arch/arm64/boot/dts/ti/k3-am654-base-board.dts >> rename to arch/arm64/boot/dts/ti/k3-am654-common-board.dts >> diff --git a/arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso >> b/arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso >> new file mode 100644 >> index 000000000000..e91c20947d05 >> --- /dev/null >> +++ b/arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso >> @@ -0,0 +1,145 @@ >> +// SPDX-License-Identifier: GPL-2.0 >> +/** >> + * DT overlay for IDK application board on AM654 EVM >> + * >> + * Copyright (C) 2018-2023 Texas Instruments Incorporated - >> https://www.ti.com/ >> + */ >> + >> +/dts-v1/; >> +/plugin/; >> + >> +#include <dt-bindings/net/ti-dp83867.h> >> +#include "k3-pinctrl.h" >> + >> +&{/} { >> + aliases { >> + ethernet1 = &icssg2_emac0; >> + ethernet2 = &icssg2_emac1; >> + }; >> + >> + /* Dual Ethernet application node on PRU-ICSSG2 */ >> + icssg2_eth: icssg2-eth { >> + compatible = "ti,am654-icssg-prueth"; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&icssg2_rgmii_pins_default>; >> + sram = <&msmc_ram>; >> + ti,prus = <&pru2_0>, <&rtu2_0>, <&tx_pru2_0>, >> + <&pru2_1>, <&rtu2_1>, <&tx_pru2_1>; >> + firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf", >> + "ti-pruss/am65x-sr2-rtu0-prueth-fw.elf", >> + "ti-pruss/am65x-sr2-txpru0-prueth-fw.elf", >> + "ti-pruss/am65x-sr2-pru1-prueth-fw.elf", >> + "ti-pruss/am65x-sr2-rtu1-prueth-fw.elf", >> + "ti-pruss/am65x-sr2-txpru1-prueth-fw.elf"; >> + >> + ti,pruss-gp-mux-sel = <2>, /* MII mode */ >> + <2>, >> + <2>, >> + <2>, /* MII mode */ >> + <2>, >> + <2>; >> + >> + ti,mii-g-rt = <&icssg2_mii_g_rt>; >> + ti,mii-rt = <&icssg2_mii_rt>; >> + ti,iep = <&icssg2_iep0>, <&icssg2_iep1>; >> + >> + interrupt-parent = <&icssg2_intc>; >> + interrupts = <24 0 2>, <25 1 3>; >> + interrupt-names = "tx_ts0", "tx_ts1"; >> + >> + dmas = <&main_udmap 0xc300>, /* egress slice 0 */ >> + <&main_udmap 0xc301>, /* egress slice 0 */ >> + <&main_udmap 0xc302>, /* egress slice 0 */ >> + <&main_udmap 0xc303>, /* egress slice 0 */ >> + <&main_udmap 0xc304>, /* egress slice 1 */ >> + <&main_udmap 0xc305>, /* egress slice 1 */ >> + <&main_udmap 0xc306>, /* egress slice 1 */ >> + <&main_udmap 0xc307>, /* egress slice 1 */ >> + <&main_udmap 0x4300>, /* ingress slice 0 */ >> + <&main_udmap 0x4301>; /* ingress slice 1 */ >> + >> + dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3", >> + "tx1-0", "tx1-1", "tx1-2", "tx1-3", >> + "rx0", "rx1"; >> + ethernet-ports { >> + #address-cells = <1>; >> + #size-cells = <0>; >> + icssg2_emac0: port@0 { >> + reg = <0>; >> + phy-handle = <&icssg2_phy0>; >> + phy-mode = "rgmii-id"; >> + ti,syscon-rgmii-delay = <&scm_conf 0x4120>; >> + /* Filled in by bootloader */ >> + local-mac-address = [00 00 00 00 00 00]; >> + }; >> + icssg2_emac1: port@1 { >> + reg = <1>; >> + phy-handle = <&icssg2_phy1>; >> + phy-mode = "rgmii-id"; >> + ti,syscon-rgmii-delay = <&scm_conf 0x4124>; >> + /* Filled in by bootloader */ >> + local-mac-address = [00 00 00 00 00 00]; >> + }; >> + }; >> + }; >> +}; >> + >> +&main_pmx0 { >> + >> + icssg2_mdio_pins_default: icssg2-mdio-default-pins { >> + pinctrl-single,pins = < >> + AM65X_IOPAD(0x0094, PIN_INPUT, 2) /* (AC19) >> PRG2_PRU0_GPO7.PRG2_MDIO0_MDIO */ >> + AM65X_IOPAD(0x00c8, PIN_OUTPUT, 2) /* (AE15) >> PRG2_PRU1_GPO7.PRG2_MDIO0_MDC */ >> + >; >> + }; >> + >> + icssg2_rgmii_pins_default: icssg2-rgmii-default-pins { >> + pinctrl-single,pins = < >> + AM65X_IOPAD(0x00ac, PIN_INPUT, 2) /* (AH15) >> PRG2_PRU1_GPO0.PRG2_RGMII2_RD0 */ >> + AM65X_IOPAD(0x00b0, PIN_INPUT, 2) /* (AC16) >> PRG2_PRU1_GPO1.PRG2_RGMII2_RD1 */ >> + AM65X_IOPAD(0x00b4, PIN_INPUT, 2) /* (AD17) >> PRG2_PRU1_GPO2.PRG2_RGMII2_RD2 */ >> + AM65X_IOPAD(0x00b8, PIN_INPUT, 2) /* (AH14) >> PRG2_PRU1_GPO3.PRG2_RGMII2_RD3 */ >> + AM65X_IOPAD(0x00cc, PIN_OUTPUT, 2) /* (AD15) >> PRG2_PRU1_GPO8.PRG2_RGMII2_TD0 */ >> + AM65X_IOPAD(0x00d0, PIN_OUTPUT, 2) /* (AF14) >> PRG2_PRU1_GPO9.PRG2_RGMII2_TD1 */ >> + AM65X_IOPAD(0x00d4, PIN_OUTPUT, 2) /* (AC15) >> PRG2_PRU1_GPO10.PRG2_RGMII2_TD2 */ >> + AM65X_IOPAD(0x00d8, PIN_OUTPUT, 2) /* (AD14) >> PRG2_PRU1_GPO11.PRG2_RGMII2_TD3 */ >> + AM65X_IOPAD(0x00dc, PIN_INPUT, 2) /* (AE14) >> PRG2_PRU1_GPO16.PRG2_RGMII2_TXC */ >> + AM65X_IOPAD(0x00c4, PIN_OUTPUT, 2) /* (AC17) >> PRG2_PRU1_GPO6.PRG2_RGMII2_TX_CTL */ >> + AM65X_IOPAD(0x00c0, PIN_INPUT, 2) /* (AG15) >> PRG2_PRU1_GPO5.PRG2_RGMII2_RXC */ >> + AM65X_IOPAD(0x00bc, PIN_INPUT, 2) /* (AG14) >> PRG2_PRU1_GPO4.PRG2_RGMII2_RX_CTL */ >> + >> + AM65X_IOPAD(0x0078, PIN_INPUT, 2) /* (AF18) >> PRG2_PRU0_GPO0.PRG2_RGMII1_RD0 */ >> + AM65X_IOPAD(0x007c, PIN_INPUT, 2) /* (AE18) >> PRG2_PRU0_GPO1.PRG2_RGMII1_RD1 */ >> + AM65X_IOPAD(0x0080, PIN_INPUT, 2) /* (AH17) >> PRG2_PRU0_GPO2.PRG2_RGMII1_RD2 */ >> + AM65X_IOPAD(0x0084, PIN_INPUT, 2) /* (AG18) >> PRG2_PRU0_GPO3.PRG2_RGMII1_RD3 */ >> + AM65X_IOPAD(0x0098, PIN_OUTPUT, 2) /* (AH16) >> PRG2_PRU0_GPO8.PRG2_RGMII1_TD0 */ >> + AM65X_IOPAD(0x009c, PIN_OUTPUT, 2) /* (AG16) >> PRG2_PRU0_GPO9.PRG2_RGMII1_TD1 */ >> + AM65X_IOPAD(0x00a0, PIN_OUTPUT, 2) /* (AF16) >> PRG2_PRU0_GPO10.PRG2_RGMII1_TD2 */ >> + AM65X_IOPAD(0x00a4, PIN_OUTPUT, 2) /* (AE16) >> PRG2_PRU0_GPO11.PRG2_RGMII1_TD3 */ >> + AM65X_IOPAD(0x00a8, PIN_INPUT, 2) /* (AD16) >> PRG2_PRU0_GPO16.PRG2_RGMII1_TXC */ >> + AM65X_IOPAD(0x0090, PIN_OUTPUT, 2) /* (AE17) >> PRG2_PRU0_GPO6.PRG2_RGMII1_TX_CTL */ >> + AM65X_IOPAD(0x008c, PIN_INPUT, 2) /* (AF17) >> PRG2_PRU0_GPO5.PRG2_RGMII1_RXC */ >> + AM65X_IOPAD(0x0088, PIN_INPUT, 2) /* (AG17) >> PRG2_PRU0_GPO4.PRG2_RGMII1_RX_CTL */ >> + >; >> + }; >> +}; >> + >> +&icssg2_mdio { >> + status = "okay"; >> + pinctrl-names = "default"; >> + pinctrl-0 = <&icssg2_mdio_pins_default>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + icssg2_phy0: ethernet-phy@0 { >> + reg = <0>; >> + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; >> + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; >> + }; >> + >> + icssg2_phy1: ethernet-phy@3 { >> + reg = <3>; >> + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; >> + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; >> + }; >> +};
On 21/09/23 21:40, Andrew Lunn wrote: >> + /* Dual Ethernet application node on PRU-ICSSG2 */ > > How relevant is "Dual Ethernet" here? You are talking of adding > switchdev support, and runtime swapping the application. All these > properties should be valid for the switch application as well? > All these properties and nodes are valid for switch mode as well. The comment of "Dual Ethernet application node" is mainly to describe the two physical ports that are present on the AM654x-EVM. > In fact, you are describing hardware here, so the application should > not actually matter. > > So maybe this comment should be: > > Ethernet node on PRU-ICSSG2 > Sure, this makes more sense. I will change the comment. > Andrew
Hi Andrew, On 22/09/23 09:52, MD Danish Anwar wrote: > On 21/09/23 22:57, Andrew Davis wrote: >> On 9/21/23 1:09 AM, MD Danish Anwar wrote: >>> ICSSG2 provides dual Gigabit Ethernet support. >>> >>> For support SR2.0 ICSSG Ethernet firmware: >>> - provide different firmware blobs and use TX_PRU. >>> - IEP0 is used as PTP Hardware Clock and can only be used for one port. >>> - TX timestamp notification comes via INTC interrupt. >>> >>> Signed-off-by: MD Danish Anwar <danishanwar@ti.com> >>> --- >>> arch/arm64/boot/dts/ti/Makefile | 4 +- >>> ...se-board.dts => k3-am654-common-board.dts} | 0 >>> arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso | 145 ++++++++++++++++++ >>> 3 files changed, 148 insertions(+), 1 deletion(-) >>> rename arch/arm64/boot/dts/ti/{k3-am654-base-board.dts => >>> k3-am654-common-board.dts} (100%) >>> create mode 100644 arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso >>> >>> diff --git a/arch/arm64/boot/dts/ti/Makefile >>> b/arch/arm64/boot/dts/ti/Makefile >>> index e7b8e2e7f083..85c91f5e832e 100644 >>> --- a/arch/arm64/boot/dts/ti/Makefile >>> +++ b/arch/arm64/boot/dts/ti/Makefile >>> @@ -42,12 +42,14 @@ dtb-$(CONFIG_ARCH_K3) += >>> k3-am642-tqma64xxl-mbax4xxl-sdcard.dtb >>> dtb-$(CONFIG_ARCH_K3) += k3-am642-tqma64xxl-mbax4xxl-wlan.dtb >>> # Boards with AM65x SoC >>> -k3-am654-gp-evm-dtbs := k3-am654-base-board.dtb >>> k3-am654-base-board-rocktech-rk101-panel.dtbo >>> +k3-am654-gp-evm-dtbs := k3-am654-common-board.dtb >>> k3-am654-base-board-rocktech-rk101-panel.dtbo >> >> Should the k3-am654-gp-evm.dtb not also have this icssg2 support? Does >> it work >> to keep this line like before or is there some conflict having both >> enabled? >> > > I have not tested this dtb (k3-am654-gp-evm.dtb). So just to be on the > safe side I kept gp-evm.dtb as it was. Ideally gp-evm.dtb should have > icssg2 support as well. But I haven't tested the combination of > base-board + icssg dtbo + rockteck dtbo. That is why I kept gp-evm dtb > as it was. Anyways, for ICSSG2's use case only k3-am654-base-board.dtb > is used so I think it's ok to leave k3-am654-gp-evm.dtb to as it was. > >> Andrew >> I tested AM654x-GP EVM with k3-am654-gp-evm.dtb with both the combination below (having k3-am654-base-board-dtbs := k3-am654-common-board.dtb k3-am654-icssg2.dtbo), ICSSG worked fine in both the scenarios and I didn't see any issue. I don't have a rocktech panel with me so couldn't test that. But as far as ICSSG is concerned it works fine with the both the combinations. Please let me know which one should I use. Should I keep gp-evm as it is (use dtb without the icssg2 overlay) or should I add icssg2 overlay in gp-evm.dtb as well. 1. k3-am654-gp-evm-dtbs := k3-am654-base-board.dtb k3-am654-base-board-rocktech-rk101-panel.dtbo 2. k3-am654-gp-evm-dtbs := k3-am654-common-board.dtb k3-am654-base-board-rocktech-rk101-panel.dtbo
On 9/25/23 3:21 AM, MD Danish Anwar wrote: > Hi Andrew, > > On 22/09/23 09:52, MD Danish Anwar wrote: >> On 21/09/23 22:57, Andrew Davis wrote: >>> On 9/21/23 1:09 AM, MD Danish Anwar wrote: >>>> ICSSG2 provides dual Gigabit Ethernet support. >>>> >>>> For support SR2.0 ICSSG Ethernet firmware: >>>> - provide different firmware blobs and use TX_PRU. >>>> - IEP0 is used as PTP Hardware Clock and can only be used for one port. >>>> - TX timestamp notification comes via INTC interrupt. >>>> >>>> Signed-off-by: MD Danish Anwar <danishanwar@ti.com> >>>> --- >>>> arch/arm64/boot/dts/ti/Makefile | 4 +- >>>> ...se-board.dts => k3-am654-common-board.dts} | 0 >>>> arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso | 145 ++++++++++++++++++ >>>> 3 files changed, 148 insertions(+), 1 deletion(-) >>>> rename arch/arm64/boot/dts/ti/{k3-am654-base-board.dts => >>>> k3-am654-common-board.dts} (100%) >>>> create mode 100644 arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso >>>> >>>> diff --git a/arch/arm64/boot/dts/ti/Makefile >>>> b/arch/arm64/boot/dts/ti/Makefile >>>> index e7b8e2e7f083..85c91f5e832e 100644 >>>> --- a/arch/arm64/boot/dts/ti/Makefile >>>> +++ b/arch/arm64/boot/dts/ti/Makefile >>>> @@ -42,12 +42,14 @@ dtb-$(CONFIG_ARCH_K3) += >>>> k3-am642-tqma64xxl-mbax4xxl-sdcard.dtb >>>> dtb-$(CONFIG_ARCH_K3) += k3-am642-tqma64xxl-mbax4xxl-wlan.dtb >>>> # Boards with AM65x SoC >>>> -k3-am654-gp-evm-dtbs := k3-am654-base-board.dtb >>>> k3-am654-base-board-rocktech-rk101-panel.dtbo >>>> +k3-am654-gp-evm-dtbs := k3-am654-common-board.dtb >>>> k3-am654-base-board-rocktech-rk101-panel.dtbo >>> >>> Should the k3-am654-gp-evm.dtb not also have this icssg2 support? Does >>> it work >>> to keep this line like before or is there some conflict having both >>> enabled? >>> >> >> I have not tested this dtb (k3-am654-gp-evm.dtb). So just to be on the >> safe side I kept gp-evm.dtb as it was. Ideally gp-evm.dtb should have >> icssg2 support as well. But I haven't tested the combination of >> base-board + icssg dtbo + rockteck dtbo. That is why I kept gp-evm dtb >> as it was. Anyways, for ICSSG2's use case only k3-am654-base-board.dtb >> is used so I think it's ok to leave k3-am654-gp-evm.dtb to as it was. >> >>> Andrew >>> > > I tested AM654x-GP EVM with k3-am654-gp-evm.dtb with both the > combination below (having k3-am654-base-board-dtbs := > k3-am654-common-board.dtb k3-am654-icssg2.dtbo), ICSSG worked fine in > both the scenarios and I didn't see any issue. I don't have a rocktech > panel with me so couldn't test that. But as far as ICSSG is concerned it > works fine with the both the combinations. Please let me know which one > should I use. Should I keep gp-evm as it is (use dtb without the icssg2 > overlay) or should I add icssg2 overlay in gp-evm.dtb as well. > > > 1. k3-am654-gp-evm-dtbs := k3-am654-base-board.dtb > k3-am654-base-board-rocktech-rk101-panel.dtbo > > > 2. k3-am654-gp-evm-dtbs := k3-am654-common-board.dtb > k3-am654-base-board-rocktech-rk101-panel.dtbo > As you said here before, most will expect the icssg2 to work on the EVM out of box, you should include it. If anyone wants something else they can apply the set of overlays that match on their own. So, use base-board. Andrew
On 9/25/2023 7:15 PM, Andrew Davis wrote: > On 9/25/23 3:21 AM, MD Danish Anwar wrote: >> Hi Andrew, >> >> On 22/09/23 09:52, MD Danish Anwar wrote: >>> On 21/09/23 22:57, Andrew Davis wrote: >>>> On 9/21/23 1:09 AM, MD Danish Anwar wrote: >>>>> ICSSG2 provides dual Gigabit Ethernet support. >>>>> >>>>> For support SR2.0 ICSSG Ethernet firmware: >>>>> - provide different firmware blobs and use TX_PRU. >>>>> - IEP0 is used as PTP Hardware Clock and can only be used for one >>>>> port. >>>>> - TX timestamp notification comes via INTC interrupt. >>>>> >>>>> Signed-off-by: MD Danish Anwar <danishanwar@ti.com> >>>>> --- >>>>> arch/arm64/boot/dts/ti/Makefile | 4 +- >>>>> ...se-board.dts => k3-am654-common-board.dts} | 0 >>>>> arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso | 145 >>>>> ++++++++++++++++++ >>>>> 3 files changed, 148 insertions(+), 1 deletion(-) >>>>> rename arch/arm64/boot/dts/ti/{k3-am654-base-board.dts => >>>>> k3-am654-common-board.dts} (100%) >>>>> create mode 100644 arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso >>>>> >>>>> diff --git a/arch/arm64/boot/dts/ti/Makefile >>>>> b/arch/arm64/boot/dts/ti/Makefile >>>>> index e7b8e2e7f083..85c91f5e832e 100644 >>>>> --- a/arch/arm64/boot/dts/ti/Makefile >>>>> +++ b/arch/arm64/boot/dts/ti/Makefile >>>>> @@ -42,12 +42,14 @@ dtb-$(CONFIG_ARCH_K3) += >>>>> k3-am642-tqma64xxl-mbax4xxl-sdcard.dtb >>>>> dtb-$(CONFIG_ARCH_K3) += k3-am642-tqma64xxl-mbax4xxl-wlan.dtb >>>>> # Boards with AM65x SoC >>>>> -k3-am654-gp-evm-dtbs := k3-am654-base-board.dtb >>>>> k3-am654-base-board-rocktech-rk101-panel.dtbo >>>>> +k3-am654-gp-evm-dtbs := k3-am654-common-board.dtb >>>>> k3-am654-base-board-rocktech-rk101-panel.dtbo >>>> >>>> Should the k3-am654-gp-evm.dtb not also have this icssg2 support? Does >>>> it work >>>> to keep this line like before or is there some conflict having both >>>> enabled? >>>> >>> >>> I have not tested this dtb (k3-am654-gp-evm.dtb). So just to be on the >>> safe side I kept gp-evm.dtb as it was. Ideally gp-evm.dtb should have >>> icssg2 support as well. But I haven't tested the combination of >>> base-board + icssg dtbo + rockteck dtbo. That is why I kept gp-evm dtb >>> as it was. Anyways, for ICSSG2's use case only k3-am654-base-board.dtb >>> is used so I think it's ok to leave k3-am654-gp-evm.dtb to as it was. >>> >>>> Andrew >>>> >> >> I tested AM654x-GP EVM with k3-am654-gp-evm.dtb with both the >> combination below (having k3-am654-base-board-dtbs := >> k3-am654-common-board.dtb k3-am654-icssg2.dtbo), ICSSG worked fine in >> both the scenarios and I didn't see any issue. I don't have a rocktech >> panel with me so couldn't test that. But as far as ICSSG is concerned it >> works fine with the both the combinations. Please let me know which one >> should I use. Should I keep gp-evm as it is (use dtb without the icssg2 >> overlay) or should I add icssg2 overlay in gp-evm.dtb as well. >> >> >> 1. k3-am654-gp-evm-dtbs := k3-am654-base-board.dtb >> k3-am654-base-board-rocktech-rk101-panel.dtbo >> >> >> 2. k3-am654-gp-evm-dtbs := k3-am654-common-board.dtb >> k3-am654-base-board-rocktech-rk101-panel.dtbo >> > > As you said here before, most will expect the icssg2 to work > on the EVM out of box, you should include it. If anyone wants > something else they can apply the set of overlays that match > on their own. > > So, use base-board. > > Andrew Sure Andrew, I will make the change and send v3.
diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index e7b8e2e7f083..85c91f5e832e 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -42,12 +42,14 @@ dtb-$(CONFIG_ARCH_K3) += k3-am642-tqma64xxl-mbax4xxl-sdcard.dtb dtb-$(CONFIG_ARCH_K3) += k3-am642-tqma64xxl-mbax4xxl-wlan.dtb # Boards with AM65x SoC -k3-am654-gp-evm-dtbs := k3-am654-base-board.dtb k3-am654-base-board-rocktech-rk101-panel.dtbo +k3-am654-gp-evm-dtbs := k3-am654-common-board.dtb k3-am654-base-board-rocktech-rk101-panel.dtbo +k3-am654-base-board-dtbs := k3-am654-common-board.dtb k3-am654-icssg2.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am6528-iot2050-basic.dtb dtb-$(CONFIG_ARCH_K3) += k3-am6528-iot2050-basic-pg2.dtb dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced.dtb dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced-m2.dtb dtb-$(CONFIG_ARCH_K3) += k3-am6548-iot2050-advanced-pg2.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am654-common-board.dtb dtb-$(CONFIG_ARCH_K3) += k3-am654-base-board.dtb dtb-$(CONFIG_ARCH_K3) += k3-am654-gp-evm.dtb diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-common-board.dts similarity index 100% rename from arch/arm64/boot/dts/ti/k3-am654-base-board.dts rename to arch/arm64/boot/dts/ti/k3-am654-common-board.dts diff --git a/arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso b/arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso new file mode 100644 index 000000000000..e91c20947d05 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso @@ -0,0 +1,145 @@ +// SPDX-License-Identifier: GPL-2.0 +/** + * DT overlay for IDK application board on AM654 EVM + * + * Copyright (C) 2018-2023 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/dts-v1/; +/plugin/; + +#include <dt-bindings/net/ti-dp83867.h> +#include "k3-pinctrl.h" + +&{/} { + aliases { + ethernet1 = &icssg2_emac0; + ethernet2 = &icssg2_emac1; + }; + + /* Dual Ethernet application node on PRU-ICSSG2 */ + icssg2_eth: icssg2-eth { + compatible = "ti,am654-icssg-prueth"; + pinctrl-names = "default"; + pinctrl-0 = <&icssg2_rgmii_pins_default>; + sram = <&msmc_ram>; + ti,prus = <&pru2_0>, <&rtu2_0>, <&tx_pru2_0>, + <&pru2_1>, <&rtu2_1>, <&tx_pru2_1>; + firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf", + "ti-pruss/am65x-sr2-rtu0-prueth-fw.elf", + "ti-pruss/am65x-sr2-txpru0-prueth-fw.elf", + "ti-pruss/am65x-sr2-pru1-prueth-fw.elf", + "ti-pruss/am65x-sr2-rtu1-prueth-fw.elf", + "ti-pruss/am65x-sr2-txpru1-prueth-fw.elf"; + + ti,pruss-gp-mux-sel = <2>, /* MII mode */ + <2>, + <2>, + <2>, /* MII mode */ + <2>, + <2>; + + ti,mii-g-rt = <&icssg2_mii_g_rt>; + ti,mii-rt = <&icssg2_mii_rt>; + ti,iep = <&icssg2_iep0>, <&icssg2_iep1>; + + interrupt-parent = <&icssg2_intc>; + interrupts = <24 0 2>, <25 1 3>; + interrupt-names = "tx_ts0", "tx_ts1"; + + dmas = <&main_udmap 0xc300>, /* egress slice 0 */ + <&main_udmap 0xc301>, /* egress slice 0 */ + <&main_udmap 0xc302>, /* egress slice 0 */ + <&main_udmap 0xc303>, /* egress slice 0 */ + <&main_udmap 0xc304>, /* egress slice 1 */ + <&main_udmap 0xc305>, /* egress slice 1 */ + <&main_udmap 0xc306>, /* egress slice 1 */ + <&main_udmap 0xc307>, /* egress slice 1 */ + <&main_udmap 0x4300>, /* ingress slice 0 */ + <&main_udmap 0x4301>; /* ingress slice 1 */ + + dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3", + "tx1-0", "tx1-1", "tx1-2", "tx1-3", + "rx0", "rx1"; + ethernet-ports { + #address-cells = <1>; + #size-cells = <0>; + icssg2_emac0: port@0 { + reg = <0>; + phy-handle = <&icssg2_phy0>; + phy-mode = "rgmii-id"; + ti,syscon-rgmii-delay = <&scm_conf 0x4120>; + /* Filled in by bootloader */ + local-mac-address = [00 00 00 00 00 00]; + }; + icssg2_emac1: port@1 { + reg = <1>; + phy-handle = <&icssg2_phy1>; + phy-mode = "rgmii-id"; + ti,syscon-rgmii-delay = <&scm_conf 0x4124>; + /* Filled in by bootloader */ + local-mac-address = [00 00 00 00 00 00]; + }; + }; + }; +}; + +&main_pmx0 { + + icssg2_mdio_pins_default: icssg2-mdio-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x0094, PIN_INPUT, 2) /* (AC19) PRG2_PRU0_GPO7.PRG2_MDIO0_MDIO */ + AM65X_IOPAD(0x00c8, PIN_OUTPUT, 2) /* (AE15) PRG2_PRU1_GPO7.PRG2_MDIO0_MDC */ + >; + }; + + icssg2_rgmii_pins_default: icssg2-rgmii-default-pins { + pinctrl-single,pins = < + AM65X_IOPAD(0x00ac, PIN_INPUT, 2) /* (AH15) PRG2_PRU1_GPO0.PRG2_RGMII2_RD0 */ + AM65X_IOPAD(0x00b0, PIN_INPUT, 2) /* (AC16) PRG2_PRU1_GPO1.PRG2_RGMII2_RD1 */ + AM65X_IOPAD(0x00b4, PIN_INPUT, 2) /* (AD17) PRG2_PRU1_GPO2.PRG2_RGMII2_RD2 */ + AM65X_IOPAD(0x00b8, PIN_INPUT, 2) /* (AH14) PRG2_PRU1_GPO3.PRG2_RGMII2_RD3 */ + AM65X_IOPAD(0x00cc, PIN_OUTPUT, 2) /* (AD15) PRG2_PRU1_GPO8.PRG2_RGMII2_TD0 */ + AM65X_IOPAD(0x00d0, PIN_OUTPUT, 2) /* (AF14) PRG2_PRU1_GPO9.PRG2_RGMII2_TD1 */ + AM65X_IOPAD(0x00d4, PIN_OUTPUT, 2) /* (AC15) PRG2_PRU1_GPO10.PRG2_RGMII2_TD2 */ + AM65X_IOPAD(0x00d8, PIN_OUTPUT, 2) /* (AD14) PRG2_PRU1_GPO11.PRG2_RGMII2_TD3 */ + AM65X_IOPAD(0x00dc, PIN_INPUT, 2) /* (AE14) PRG2_PRU1_GPO16.PRG2_RGMII2_TXC */ + AM65X_IOPAD(0x00c4, PIN_OUTPUT, 2) /* (AC17) PRG2_PRU1_GPO6.PRG2_RGMII2_TX_CTL */ + AM65X_IOPAD(0x00c0, PIN_INPUT, 2) /* (AG15) PRG2_PRU1_GPO5.PRG2_RGMII2_RXC */ + AM65X_IOPAD(0x00bc, PIN_INPUT, 2) /* (AG14) PRG2_PRU1_GPO4.PRG2_RGMII2_RX_CTL */ + + AM65X_IOPAD(0x0078, PIN_INPUT, 2) /* (AF18) PRG2_PRU0_GPO0.PRG2_RGMII1_RD0 */ + AM65X_IOPAD(0x007c, PIN_INPUT, 2) /* (AE18) PRG2_PRU0_GPO1.PRG2_RGMII1_RD1 */ + AM65X_IOPAD(0x0080, PIN_INPUT, 2) /* (AH17) PRG2_PRU0_GPO2.PRG2_RGMII1_RD2 */ + AM65X_IOPAD(0x0084, PIN_INPUT, 2) /* (AG18) PRG2_PRU0_GPO3.PRG2_RGMII1_RD3 */ + AM65X_IOPAD(0x0098, PIN_OUTPUT, 2) /* (AH16) PRG2_PRU0_GPO8.PRG2_RGMII1_TD0 */ + AM65X_IOPAD(0x009c, PIN_OUTPUT, 2) /* (AG16) PRG2_PRU0_GPO9.PRG2_RGMII1_TD1 */ + AM65X_IOPAD(0x00a0, PIN_OUTPUT, 2) /* (AF16) PRG2_PRU0_GPO10.PRG2_RGMII1_TD2 */ + AM65X_IOPAD(0x00a4, PIN_OUTPUT, 2) /* (AE16) PRG2_PRU0_GPO11.PRG2_RGMII1_TD3 */ + AM65X_IOPAD(0x00a8, PIN_INPUT, 2) /* (AD16) PRG2_PRU0_GPO16.PRG2_RGMII1_TXC */ + AM65X_IOPAD(0x0090, PIN_OUTPUT, 2) /* (AE17) PRG2_PRU0_GPO6.PRG2_RGMII1_TX_CTL */ + AM65X_IOPAD(0x008c, PIN_INPUT, 2) /* (AF17) PRG2_PRU0_GPO5.PRG2_RGMII1_RXC */ + AM65X_IOPAD(0x0088, PIN_INPUT, 2) /* (AG17) PRG2_PRU0_GPO4.PRG2_RGMII1_RX_CTL */ + >; + }; +}; + +&icssg2_mdio { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&icssg2_mdio_pins_default>; + #address-cells = <1>; + #size-cells = <0>; + + icssg2_phy0: ethernet-phy@0 { + reg = <0>; + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; + }; + + icssg2_phy1: ethernet-phy@3 { + reg = <3>; + ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; + ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; + }; +};
ICSSG2 provides dual Gigabit Ethernet support. For support SR2.0 ICSSG Ethernet firmware: - provide different firmware blobs and use TX_PRU. - IEP0 is used as PTP Hardware Clock and can only be used for one port. - TX timestamp notification comes via INTC interrupt. Signed-off-by: MD Danish Anwar <danishanwar@ti.com> --- arch/arm64/boot/dts/ti/Makefile | 4 +- ...se-board.dts => k3-am654-common-board.dts} | 0 arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso | 145 ++++++++++++++++++ 3 files changed, 148 insertions(+), 1 deletion(-) rename arch/arm64/boot/dts/ti/{k3-am654-base-board.dts => k3-am654-common-board.dts} (100%) create mode 100644 arch/arm64/boot/dts/ti/k3-am654-icssg2.dtso