Message ID | 20230911074233.31556-19-shawn.sung@mediatek.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Add display driver for MT8188 VDOSYS1 | expand |
Hi, Hsiao-chien: On Mon, 2023-09-11 at 15:42 +0800, Hsiao Chien Sung wrote: > Add MT8188 Padding to OVL adaptor to probe the driver. Reviewed-by: CK Hu <ck.hu@mediatek.com> > > Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> > --- > .../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 33 > +++++++++++++++++++ > 1 file changed, 33 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c > b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c > index 84133303a6ec..217c39af27bd 100644 > --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c > +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c > @@ -30,6 +30,7 @@ enum mtk_ovl_adaptor_comp_type { > OVL_ADAPTOR_TYPE_ETHDR, > OVL_ADAPTOR_TYPE_MDP_RDMA, > OVL_ADAPTOR_TYPE_MERGE, > + OVL_ADAPTOR_TYPE_PADDING, > OVL_ADAPTOR_TYPE_NUM, > }; > > @@ -47,6 +48,14 @@ enum mtk_ovl_adaptor_comp_id { > OVL_ADAPTOR_MERGE1, > OVL_ADAPTOR_MERGE2, > OVL_ADAPTOR_MERGE3, > + OVL_ADAPTOR_PADDING0, > + OVL_ADAPTOR_PADDING1, > + OVL_ADAPTOR_PADDING2, > + OVL_ADAPTOR_PADDING3, > + OVL_ADAPTOR_PADDING4, > + OVL_ADAPTOR_PADDING5, > + OVL_ADAPTOR_PADDING6, > + OVL_ADAPTOR_PADDING7, > OVL_ADAPTOR_ID_MAX > }; > > @@ -67,6 +76,7 @@ static const char * const > private_comp_stem[OVL_ADAPTOR_TYPE_NUM] = { > [OVL_ADAPTOR_TYPE_ETHDR] = "ethdr", > [OVL_ADAPTOR_TYPE_MDP_RDMA] = "vdo1-rdma", > [OVL_ADAPTOR_TYPE_MERGE] = "merge", > + [OVL_ADAPTOR_TYPE_PADDING] = "padding", > }; > > static const struct mtk_ddp_comp_funcs _ethdr = { > @@ -79,6 +89,11 @@ static const struct mtk_ddp_comp_funcs _merge = { > .clk_disable = mtk_merge_clk_disable, > }; > > +static const struct mtk_ddp_comp_funcs _padding = { > + .clk_enable = mtk_padding_clk_enable, > + .clk_disable = mtk_padding_clk_disable, > +}; > + > static const struct mtk_ddp_comp_funcs _rdma = { > .clk_enable = mtk_mdp_rdma_clk_enable, > .clk_disable = mtk_mdp_rdma_clk_disable, > @@ -98,6 +113,14 @@ static const struct ovl_adaptor_comp_match > comp_matches[OVL_ADAPTOR_ID_MAX] = { > [OVL_ADAPTOR_MERGE1] = { OVL_ADAPTOR_TYPE_MERGE, > DDP_COMPONENT_MERGE2, 2, &_merge }, > [OVL_ADAPTOR_MERGE2] = { OVL_ADAPTOR_TYPE_MERGE, > DDP_COMPONENT_MERGE3, 3, &_merge }, > [OVL_ADAPTOR_MERGE3] = { OVL_ADAPTOR_TYPE_MERGE, > DDP_COMPONENT_MERGE4, 4, &_merge }, > + [OVL_ADAPTOR_PADDING0] = { OVL_ADAPTOR_TYPE_PADDING, > DDP_COMPONENT_PADDING0, 0, &_padding }, > + [OVL_ADAPTOR_PADDING1] = { OVL_ADAPTOR_TYPE_PADDING, > DDP_COMPONENT_PADDING1, 1, &_padding }, > + [OVL_ADAPTOR_PADDING2] = { OVL_ADAPTOR_TYPE_PADDING, > DDP_COMPONENT_PADDING2, 2, &_padding }, > + [OVL_ADAPTOR_PADDING3] = { OVL_ADAPTOR_TYPE_PADDING, > DDP_COMPONENT_PADDING3, 3, &_padding }, > + [OVL_ADAPTOR_PADDING4] = { OVL_ADAPTOR_TYPE_PADDING, > DDP_COMPONENT_PADDING4, 4, &_padding }, > + [OVL_ADAPTOR_PADDING5] = { OVL_ADAPTOR_TYPE_PADDING, > DDP_COMPONENT_PADDING5, 5, &_padding }, > + [OVL_ADAPTOR_PADDING6] = { OVL_ADAPTOR_TYPE_PADDING, > DDP_COMPONENT_PADDING6, 6, &_padding }, > + [OVL_ADAPTOR_PADDING7] = { OVL_ADAPTOR_TYPE_PADDING, > DDP_COMPONENT_PADDING7, 7, &_padding }, > }; > > void mtk_ovl_adaptor_layer_config(struct device *dev, unsigned int > idx, > @@ -109,6 +132,8 @@ void mtk_ovl_adaptor_layer_config(struct device > *dev, unsigned int idx, > struct mtk_mdp_rdma_cfg rdma_config = {0}; > struct device *rdma_l; > struct device *rdma_r; > + struct device *padding_l; > + struct device *padding_r; > struct device *merge; > struct device *ethdr; > const struct drm_format_info *fmt_info = > drm_format_info(pending->format); > @@ -125,6 +150,8 @@ void mtk_ovl_adaptor_layer_config(struct device > *dev, unsigned int idx, > > rdma_l = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_MDP_RDMA0 + > 2 * idx]; > rdma_r = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_MDP_RDMA0 + > 2 * idx + 1]; > + padding_l = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_PADDING0 > + 2 * idx]; > + padding_r = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_PADDING0 > + 2 * idx + 1]; > merge = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_MERGE0 + > idx]; > ethdr = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_ETHDR0]; > > @@ -160,10 +187,15 @@ void mtk_ovl_adaptor_layer_config(struct device > *dev, unsigned int idx, > rdma_config.color_encoding = pending->color_encoding; > mtk_mdp_rdma_config(rdma_l, &rdma_config, cmdq_pkt); > > + if (padding_l) > + mtk_padding_config(padding_l, cmdq_pkt); > + > if (use_dual_pipe) { > rdma_config.x_left = l_w; > rdma_config.width = r_w; > mtk_mdp_rdma_config(rdma_r, &rdma_config, cmdq_pkt); > + if (padding_r) > + mtk_padding_config(padding_r, cmdq_pkt); > } > > mtk_merge_start_cmdq(merge, cmdq_pkt); > @@ -354,6 +386,7 @@ static int ovl_adaptor_comp_get_id(struct device > *dev, struct device_node *node, > } > > static const struct of_device_id mtk_ovl_adaptor_comp_dt_ids[] = { > + { .compatible = "mediatek,mt8188-padding", .data = (void > *)OVL_ADAPTOR_TYPE_PADDING }, > { .compatible = "mediatek,mt8195-disp-ethdr", .data = (void > *)OVL_ADAPTOR_TYPE_ETHDR }, > { .compatible = "mediatek,mt8195-disp-merge", .data = (void > *)OVL_ADAPTOR_TYPE_MERGE }, > { .compatible = "mediatek,mt8195-vdo1-rdma", .data = (void > *)OVL_ADAPTOR_TYPE_MDP_RDMA }, > -- > 2.18.0 >
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c index 84133303a6ec..217c39af27bd 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c @@ -30,6 +30,7 @@ enum mtk_ovl_adaptor_comp_type { OVL_ADAPTOR_TYPE_ETHDR, OVL_ADAPTOR_TYPE_MDP_RDMA, OVL_ADAPTOR_TYPE_MERGE, + OVL_ADAPTOR_TYPE_PADDING, OVL_ADAPTOR_TYPE_NUM, }; @@ -47,6 +48,14 @@ enum mtk_ovl_adaptor_comp_id { OVL_ADAPTOR_MERGE1, OVL_ADAPTOR_MERGE2, OVL_ADAPTOR_MERGE3, + OVL_ADAPTOR_PADDING0, + OVL_ADAPTOR_PADDING1, + OVL_ADAPTOR_PADDING2, + OVL_ADAPTOR_PADDING3, + OVL_ADAPTOR_PADDING4, + OVL_ADAPTOR_PADDING5, + OVL_ADAPTOR_PADDING6, + OVL_ADAPTOR_PADDING7, OVL_ADAPTOR_ID_MAX }; @@ -67,6 +76,7 @@ static const char * const private_comp_stem[OVL_ADAPTOR_TYPE_NUM] = { [OVL_ADAPTOR_TYPE_ETHDR] = "ethdr", [OVL_ADAPTOR_TYPE_MDP_RDMA] = "vdo1-rdma", [OVL_ADAPTOR_TYPE_MERGE] = "merge", + [OVL_ADAPTOR_TYPE_PADDING] = "padding", }; static const struct mtk_ddp_comp_funcs _ethdr = { @@ -79,6 +89,11 @@ static const struct mtk_ddp_comp_funcs _merge = { .clk_disable = mtk_merge_clk_disable, }; +static const struct mtk_ddp_comp_funcs _padding = { + .clk_enable = mtk_padding_clk_enable, + .clk_disable = mtk_padding_clk_disable, +}; + static const struct mtk_ddp_comp_funcs _rdma = { .clk_enable = mtk_mdp_rdma_clk_enable, .clk_disable = mtk_mdp_rdma_clk_disable, @@ -98,6 +113,14 @@ static const struct ovl_adaptor_comp_match comp_matches[OVL_ADAPTOR_ID_MAX] = { [OVL_ADAPTOR_MERGE1] = { OVL_ADAPTOR_TYPE_MERGE, DDP_COMPONENT_MERGE2, 2, &_merge }, [OVL_ADAPTOR_MERGE2] = { OVL_ADAPTOR_TYPE_MERGE, DDP_COMPONENT_MERGE3, 3, &_merge }, [OVL_ADAPTOR_MERGE3] = { OVL_ADAPTOR_TYPE_MERGE, DDP_COMPONENT_MERGE4, 4, &_merge }, + [OVL_ADAPTOR_PADDING0] = { OVL_ADAPTOR_TYPE_PADDING, DDP_COMPONENT_PADDING0, 0, &_padding }, + [OVL_ADAPTOR_PADDING1] = { OVL_ADAPTOR_TYPE_PADDING, DDP_COMPONENT_PADDING1, 1, &_padding }, + [OVL_ADAPTOR_PADDING2] = { OVL_ADAPTOR_TYPE_PADDING, DDP_COMPONENT_PADDING2, 2, &_padding }, + [OVL_ADAPTOR_PADDING3] = { OVL_ADAPTOR_TYPE_PADDING, DDP_COMPONENT_PADDING3, 3, &_padding }, + [OVL_ADAPTOR_PADDING4] = { OVL_ADAPTOR_TYPE_PADDING, DDP_COMPONENT_PADDING4, 4, &_padding }, + [OVL_ADAPTOR_PADDING5] = { OVL_ADAPTOR_TYPE_PADDING, DDP_COMPONENT_PADDING5, 5, &_padding }, + [OVL_ADAPTOR_PADDING6] = { OVL_ADAPTOR_TYPE_PADDING, DDP_COMPONENT_PADDING6, 6, &_padding }, + [OVL_ADAPTOR_PADDING7] = { OVL_ADAPTOR_TYPE_PADDING, DDP_COMPONENT_PADDING7, 7, &_padding }, }; void mtk_ovl_adaptor_layer_config(struct device *dev, unsigned int idx, @@ -109,6 +132,8 @@ void mtk_ovl_adaptor_layer_config(struct device *dev, unsigned int idx, struct mtk_mdp_rdma_cfg rdma_config = {0}; struct device *rdma_l; struct device *rdma_r; + struct device *padding_l; + struct device *padding_r; struct device *merge; struct device *ethdr; const struct drm_format_info *fmt_info = drm_format_info(pending->format); @@ -125,6 +150,8 @@ void mtk_ovl_adaptor_layer_config(struct device *dev, unsigned int idx, rdma_l = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_MDP_RDMA0 + 2 * idx]; rdma_r = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_MDP_RDMA0 + 2 * idx + 1]; + padding_l = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_PADDING0 + 2 * idx]; + padding_r = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_PADDING0 + 2 * idx + 1]; merge = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_MERGE0 + idx]; ethdr = ovl_adaptor->ovl_adaptor_comp[OVL_ADAPTOR_ETHDR0]; @@ -160,10 +187,15 @@ void mtk_ovl_adaptor_layer_config(struct device *dev, unsigned int idx, rdma_config.color_encoding = pending->color_encoding; mtk_mdp_rdma_config(rdma_l, &rdma_config, cmdq_pkt); + if (padding_l) + mtk_padding_config(padding_l, cmdq_pkt); + if (use_dual_pipe) { rdma_config.x_left = l_w; rdma_config.width = r_w; mtk_mdp_rdma_config(rdma_r, &rdma_config, cmdq_pkt); + if (padding_r) + mtk_padding_config(padding_r, cmdq_pkt); } mtk_merge_start_cmdq(merge, cmdq_pkt); @@ -354,6 +386,7 @@ static int ovl_adaptor_comp_get_id(struct device *dev, struct device_node *node, } static const struct of_device_id mtk_ovl_adaptor_comp_dt_ids[] = { + { .compatible = "mediatek,mt8188-padding", .data = (void *)OVL_ADAPTOR_TYPE_PADDING }, { .compatible = "mediatek,mt8195-disp-ethdr", .data = (void *)OVL_ADAPTOR_TYPE_ETHDR }, { .compatible = "mediatek,mt8195-disp-merge", .data = (void *)OVL_ADAPTOR_TYPE_MERGE }, { .compatible = "mediatek,mt8195-vdo1-rdma", .data = (void *)OVL_ADAPTOR_TYPE_MDP_RDMA },
Add MT8188 Padding to OVL adaptor to probe the driver. Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com> --- .../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 33 +++++++++++++++++++ 1 file changed, 33 insertions(+) -- 2.18.0