diff mbox series

[2/3] drm/i915/xe2lpd: update the dsc feature capability

Message ID 20230927101729.18681-3-vinod.govindapillai@intel.com (mailing list archive)
State New, archived
Headers show
Series scalable display feature configurations | expand

Commit Message

Vinod Govindapillai Sept. 27, 2023, 10:17 a.m. UTC 
Update the global dsc flag based on the display capabilities
reported.

Bspec: 71161
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_device.c | 7 +++++++
 1 file changed, 7 insertions(+)

Comments

Jani Nikula Sept. 28, 2023, 8:37 a.m. UTC | #1 
On Wed, 27 Sep 2023, Vinod Govindapillai <vinod.govindapillai@intel.com> wrote:
> Update the global dsc flag based on the display capabilities
> reported.
>
> Bspec: 71161
> Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_device.c | 7 +++++++
>  1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
> index a6a18eae7ae8..e51506e37384 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -1065,6 +1065,13 @@ void intel_display_device_info_runtime_init(struct drm_i915_private *i915)
>  			display_runtime->has_dsc = 0;
>  	}
>  
> +	if (DISPLAY_VER(i915) >= 20) {
> +		u32 cap = intel_de_read(i915, XE2LPD_DE_CAP);
> +
> +		if (REG_FIELD_GET(XE2LPD_DE_CAP_DSC_MASK, cap) == 1)

Shouldn't the field values be defined too? Why the magic 1?

BR,
Jani.

> +			display_runtime->has_dsc = 0;
> +	}
> +
>  	return;
>  
>  display_fused_off:
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index a6a18eae7ae8..e51506e37384 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -1065,6 +1065,13 @@  void intel_display_device_info_runtime_init(struct drm_i915_private *i915)
 			display_runtime->has_dsc = 0;
 	}
 
+	if (DISPLAY_VER(i915) >= 20) {
+		u32 cap = intel_de_read(i915, XE2LPD_DE_CAP);
+
+		if (REG_FIELD_GET(XE2LPD_DE_CAP_DSC_MASK, cap) == 1)
+			display_runtime->has_dsc = 0;
+	}
+
 	return;
 
 display_fused_off: