diff mbox series

[v4,1/2] arm64: dts: imx8-ss-img: Assign slot for imx jpeg encoder/decoder

Message ID 20230926101000.13392-1-ming.qian@nxp.com (mailing list archive)
State New, archived
Headers show
Series [v4,1/2] arm64: dts: imx8-ss-img: Assign slot for imx jpeg encoder/decoder | expand

Commit Message

Ming Qian Sept. 26, 2023, 10:09 a.m. UTC 
There are total 4 slots available in the IP, and we only need to use one
slot in one os, assign a single slot for imx jpeg device node, configure
interrupt and power domain only for 1 slot, not for the all 4 slots.

Signed-off-by: Ming Qian <ming.qian@nxp.com>
---
v4
- improve the commit message
v3
- add vender prefix, change property slot to nxp,slot

 .../arm64/boot/dts/freescale/imx8-ss-img.dtsi | 22 +++++--------------
 1 file changed, 6 insertions(+), 16 deletions(-)

Comments

Krzysztof Kozlowski Sept. 27, 2023, 8:10 a.m. UTC | #1 
On 26/09/2023 12:09, Ming Qian wrote:
> There are total 4 slots available in the IP, and we only need to use one
> slot in one os, assign a single slot for imx jpeg device node, configure
> interrupt and power domain only for 1 slot, not for the all 4 slots.

DTS is independent of OS, so same DTS will be used by two OSes. This
patch is not correct in that matter. Explanation is not proper
justification.

> 
> Signed-off-by: Ming Qian <ming.qian@nxp.com>
> ---
> v4
> - improve the commit message
> v3
> - add vender prefix, change property slot to nxp,slot

Best regards,
Krzysztof
Ming Qian Sept. 27, 2023, 9:19 a.m. UTC | #2 
>From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>Sent: 2023年9月27日 16:11
>To: Ming Qian <ming.qian@nxp.com>; Mirela Rabulea (OSS)
><mirela.rabulea@oss.nxp.com>; robh+dt@kernel.org; shawnguo@kernel.org
>Cc: krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org;
>mchehab@kernel.org; hverkuil-cisco@xs4all.nl; s.hauer@pengutronix.de;
>kernel@pengutronix.de; festevam@gmail.com; X.H. Bao
><xiahong.bao@nxp.com>; Eagle Zhou <eagle.zhou@nxp.com>; Tao Jiang
><tao.jiang_2@nxp.com>; dl-linux-imx <linux-imx@nxp.com>;
>devicetree@vger.kernel.org; linux-media@vger.kernel.org; linux-
>kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org
>Subject: [EXT] Re: [PATCH v4 1/2] arm64: dts: imx8-ss-img: Assign slot for imx
>jpeg encoder/decoder
>
>Caution: This is an external email. Please take care when clicking links or
>opening attachments. When in doubt, report the message using the 'Report
>this email' button
>
>
>On 26/09/2023 12:09, Ming Qian wrote:
>> There are total 4 slots available in the IP, and we only need to use
>> one slot in one os, assign a single slot for imx jpeg device node,
>> configure interrupt and power domain only for 1 slot, not for the all 4 slots.
>
>DTS is independent of OS, so same DTS will be used by two OSes. This patch is
>not correct in that matter. Explanation is not proper justification.
>

Hi Krzysztof,

I agree that DTS is independent of OS, otherwise we need to choose the slot index by hard code in driver.
I think it's just the reason why we need this patch.
We have different platforms that use this IP, we need to configure the slot in dts.

Would you please give some guide about proper justification?

Thanks
Ming Qian

>>
>> Signed-off-by: Ming Qian <ming.qian@nxp.com>
>> ---
>> v4
>> - improve the commit message
>> v3
>> - add vender prefix, change property slot to nxp,slot
>
>Best regards,
>Krzysztof
Krzysztof Kozlowski Sept. 28, 2023, 5:02 a.m. UTC | #3 
On 27/09/2023 11:19, Ming Qian wrote:
>> From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>> Sent: 2023年9月27日 16:11
>> To: Ming Qian <ming.qian@nxp.com>; Mirela Rabulea (OSS)
>> <mirela.rabulea@oss.nxp.com>; robh+dt@kernel.org; shawnguo@kernel.org
>> Cc: krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org;
>> mchehab@kernel.org; hverkuil-cisco@xs4all.nl; s.hauer@pengutronix.de;
>> kernel@pengutronix.de; festevam@gmail.com; X.H. Bao
>> <xiahong.bao@nxp.com>; Eagle Zhou <eagle.zhou@nxp.com>; Tao Jiang
>> <tao.jiang_2@nxp.com>; dl-linux-imx <linux-imx@nxp.com>;
>> devicetree@vger.kernel.org; linux-media@vger.kernel.org; linux-
>> kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org
>> Subject: [EXT] Re: [PATCH v4 1/2] arm64: dts: imx8-ss-img: Assign slot for imx
>> jpeg encoder/decoder
>>
>> Caution: This is an external email. Please take care when clicking links or
>> opening attachments. When in doubt, report the message using the 'Report
>> this email' button
>>
>>
>> On 26/09/2023 12:09, Ming Qian wrote:
>>> There are total 4 slots available in the IP, and we only need to use
>>> one slot in one os, assign a single slot for imx jpeg device node,
>>> configure interrupt and power domain only for 1 slot, not for the all 4 slots.
>>
>> DTS is independent of OS, so same DTS will be used by two OSes. This patch is
>> not correct in that matter. Explanation is not proper justification.
>>
> 
> Hi Krzysztof,
> 
> I agree that DTS is independent of OS, otherwise we need to choose the slot index by hard code in driver.
> I think it's just the reason why we need this patch.
> We have different platforms that use this IP, we need to configure the slot in dts.

I still do not know what is the "slot". VM partitioning? Some pinmux
configuration?

Other platforms will use the same DTS, so the same slot and you are back
at the same problem... DTS should be the full description of the
hardware, thus removing interrupts is not "full description" anymore.

> 
> Would you please give some guide about proper justification?
Describe architecture and then propose generic solution matching
multiple vendors and IP blocks, not something solving only this one problem.

Best regards,
Krzysztof
Ming Qian Sept. 28, 2023, 9:51 a.m. UTC | #4 
>From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>Sent: 2023年9月28日 13:03
>To: Ming Qian <ming.qian@nxp.com>; Mirela Rabulea (OSS)
><mirela.rabulea@oss.nxp.com>; robh+dt@kernel.org; shawnguo@kernel.org
>Cc: krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org;
>mchehab@kernel.org; hverkuil-cisco@xs4all.nl; s.hauer@pengutronix.de;
>kernel@pengutronix.de; festevam@gmail.com; X.H. Bao
><xiahong.bao@nxp.com>; Eagle Zhou <eagle.zhou@nxp.com>; Tao Jiang
><tao.jiang_2@nxp.com>; dl-linux-imx <linux-imx@nxp.com>;
>devicetree@vger.kernel.org; linux-media@vger.kernel.org; linux-
>kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org
>Subject: Re: [EXT] Re: [PATCH v4 1/2] arm64: dts: imx8-ss-img: Assign slot for
>imx jpeg encoder/decoder
>
>Caution: This is an external email. Please take care when clicking links or
>opening attachments. When in doubt, report the message using the 'Report
>this email' button
>
>
>On 27/09/2023 11:19, Ming Qian wrote:
>>> From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>>> Sent: 2023年9月27日 16:11
>>> To: Ming Qian <ming.qian@nxp.com>; Mirela Rabulea (OSS)
>>> <mirela.rabulea@oss.nxp.com>; robh+dt@kernel.org;
>shawnguo@kernel.org
>>> Cc: krzysztof.kozlowski+dt@linaro.org; conor+dt@kernel.org;
>>> mchehab@kernel.org; hverkuil-cisco@xs4all.nl; s.hauer@pengutronix.de;
>>> kernel@pengutronix.de; festevam@gmail.com; X.H. Bao
>>> <xiahong.bao@nxp.com>; Eagle Zhou <eagle.zhou@nxp.com>; Tao Jiang
>>> <tao.jiang_2@nxp.com>; dl-linux-imx <linux-imx@nxp.com>;
>>> devicetree@vger.kernel.org; linux-media@vger.kernel.org; linux-
>>> kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org
>>> Subject: [EXT] Re: [PATCH v4 1/2] arm64: dts: imx8-ss-img: Assign
>>> slot for imx jpeg encoder/decoder
>>>
>>> Caution: This is an external email. Please take care when clicking
>>> links or opening attachments. When in doubt, report the message using
>>> the 'Report this email' button
>>>
>>>
>>> On 26/09/2023 12:09, Ming Qian wrote:
>>>> There are total 4 slots available in the IP, and we only need to use
>>>> one slot in one os, assign a single slot for imx jpeg device node,
>>>> configure interrupt and power domain only for 1 slot, not for the all 4
>slots.
>>>
>>> DTS is independent of OS, so same DTS will be used by two OSes. This
>>> patch is not correct in that matter. Explanation is not proper justification.
>>>
>>
>> Hi Krzysztof,
>>
>> I agree that DTS is independent of OS, otherwise we need to choose the slot
>index by hard code in driver.
>> I think it's just the reason why we need this patch.
>> We have different platforms that use this IP, we need to configure the slot in
>dts.
>
>I still do not know what is the "slot". VM partitioning? Some pinmux
>configuration?
>
>Other platforms will use the same DTS, so the same slot and you are back at
>the same problem... DTS should be the full description of the hardware, thus
>removing interrupts is not "full description" anymore.
>

Hi Krzysztof,
    I have tried to explain the slot in the previous mail, although I'm not sure I made that clear. I think I need an example here. In our imx8q platform, we just want to assign slot 0 to linux, but in imx9 platform, we may want to assign slot 0 to linux, but slot 1 to a vm. So we don't want to enable power of slot 1 in linux.

Best regards,
Ming


>>
>> Would you please give some guide about proper justification?
>Describe architecture and then propose generic solution matching multiple
>vendors and IP blocks, not something solving only this one problem.
>
>Best regards,
>Krzysztof
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
index a90654155a88..3043c416c43e 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi
@@ -18,10 +18,7 @@  img_ipg_clk: clock-img-ipg {
 
 	jpegdec: jpegdec@58400000 {
 		reg = <0x58400000 0x00050000>;
-		interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
+		interrupts = <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&img_jpeg_dec_lpcg IMX_LPCG_CLK_0>,
 			 <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>;
 		clock-names = "per", "ipg";
@@ -29,18 +26,13 @@  jpegdec: jpegdec@58400000 {
 				  <&img_jpeg_dec_lpcg IMX_LPCG_CLK_4>;
 		assigned-clock-rates = <200000000>, <200000000>;
 		power-domains = <&pd IMX_SC_R_MJPEG_DEC_MP>,
-				<&pd IMX_SC_R_MJPEG_DEC_S0>,
-				<&pd IMX_SC_R_MJPEG_DEC_S1>,
-				<&pd IMX_SC_R_MJPEG_DEC_S2>,
-				<&pd IMX_SC_R_MJPEG_DEC_S3>;
+				<&pd IMX_SC_R_MJPEG_DEC_S0>;
+		nxp,slot = <0>;
 	};
 
 	jpegenc: jpegenc@58450000 {
 		reg = <0x58450000 0x00050000>;
-		interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
-			     <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>;
+		interrupts = <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&img_jpeg_enc_lpcg IMX_LPCG_CLK_0>,
 			 <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>;
 		clock-names = "per", "ipg";
@@ -48,10 +40,8 @@  jpegenc: jpegenc@58450000 {
 				  <&img_jpeg_enc_lpcg IMX_LPCG_CLK_4>;
 		assigned-clock-rates = <200000000>, <200000000>;
 		power-domains = <&pd IMX_SC_R_MJPEG_ENC_MP>,
-				<&pd IMX_SC_R_MJPEG_ENC_S0>,
-				<&pd IMX_SC_R_MJPEG_ENC_S1>,
-				<&pd IMX_SC_R_MJPEG_ENC_S2>,
-				<&pd IMX_SC_R_MJPEG_ENC_S3>;
+				<&pd IMX_SC_R_MJPEG_ENC_S0>;
+		nxp,slot = <0>;
 	};
 
 	img_jpeg_dec_lpcg: clock-controller@585d0000 {