Message ID | 20230928063448.3544464-1-xianwei.zhao@amlogic.com (mailing list archive) |
---|---|
Headers | show |
Series | Add C3 SoC PLLs and Peripheral clock | expand |
On 28/09/2023 08:34, Xianwei Zhao wrote: > Add C3 SoC PLLs and Peripheral clock controller dt-bindings. > Add PLLs and Peripheral clock controller driver for C3 SOC. > > Xianwei Zhao (4): > dt-bindings: clock: add Amlogic C3 PLL clock controller bindings > dt-bindings: clock: add Amlogic C3 peripherals clock controller > bindings > clk: meson: C3: add support for the C3 SoC PLL clock > clk: meson: c3: add c3 clock peripherals controller driver > This was absolutely never tested :( It does not look like you tested the bindings, at least after quick look. Please run `make dt_binding_check` (see Documentation/devicetree/bindings/writing-schema.rst for instructions). Maybe you need to update your dtschema and yamllint. Best regards, Krzysztof
Hi Krzysztof, Thanks, I will fix errors of bindings in next version. On 2023/9/30 23:53, Krzysztof Kozlowski wrote: > [ EXTERNAL EMAIL ] > > On 28/09/2023 08:34, Xianwei Zhao wrote: >> Add C3 SoC PLLs and Peripheral clock controller dt-bindings. >> Add PLLs and Peripheral clock controller driver for C3 SOC. >> >> Xianwei Zhao (4): >> dt-bindings: clock: add Amlogic C3 PLL clock controller bindings >> dt-bindings: clock: add Amlogic C3 peripherals clock controller >> bindings >> clk: meson: C3: add support for the C3 SoC PLL clock >> clk: meson: c3: add c3 clock peripherals controller driver >> > > This was absolutely never tested :( > > It does not look like you tested the bindings, at least after quick > look. Please run `make dt_binding_check` (see > Documentation/devicetree/bindings/writing-schema.rst for instructions). > Maybe you need to update your dtschema and yamllint. > > Best regards, > Krzysztof >