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[0/4] Add C3 SoC PLLs and Peripheral clock

Message ID 20230928063448.3544464-1-xianwei.zhao@amlogic.com (mailing list archive)
Headers show
Series Add C3 SoC PLLs and Peripheral clock | expand

Message

Xianwei Zhao Sept. 28, 2023, 6:34 a.m. UTC
Add C3 SoC PLLs and Peripheral clock controller dt-bindings.
Add PLLs and Peripheral clock controller driver for C3 SOC.

Xianwei Zhao (4):
  dt-bindings: clock: add Amlogic C3 PLL clock controller bindings
  dt-bindings: clock: add Amlogic C3 peripherals clock controller
    bindings
  clk: meson: C3: add support for the C3 SoC PLL clock
  clk: meson: c3: add c3 clock peripherals controller driver

 .../clock/amlogic,c3-peripherals-clkc.yaml    |   86 ++
 .../bindings/clock/amlogic,c3-pll-clkc.yaml   |   53 +
 drivers/clk/meson/Kconfig                     |   25 +
 drivers/clk/meson/Makefile                    |    2 +
 drivers/clk/meson/c3-peripherals.c            | 1372 +++++++++++++++++
 drivers/clk/meson/c3-peripherals.h            |   48 +
 drivers/clk/meson/c3-pll.c                    |  510 ++++++
 drivers/clk/meson/c3-pll.h                    |   35 +
 .../clock/amlogic,c3-peripherals-clkc.h       |  230 +++
 .../dt-bindings/clock/amlogic,c3-pll-clkc.h   |   42 +
 10 files changed, 2403 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/amlogic,c3-peripherals-clkc.yaml
 create mode 100644 Documentation/devicetree/bindings/clock/amlogic,c3-pll-clkc.yaml
 create mode 100644 drivers/clk/meson/c3-peripherals.c
 create mode 100644 drivers/clk/meson/c3-peripherals.h
 create mode 100644 drivers/clk/meson/c3-pll.c
 create mode 100644 drivers/clk/meson/c3-pll.h
 create mode 100644 include/dt-bindings/clock/amlogic,c3-peripherals-clkc.h
 create mode 100644 include/dt-bindings/clock/amlogic,c3-pll-clkc.h


base-commit: 57b55c76aaf1ba50ecc6dcee5cd6843dc4d85239

Comments

Krzysztof Kozlowski Sept. 30, 2023, 3:53 p.m. UTC | #1
On 28/09/2023 08:34, Xianwei Zhao wrote:
> Add C3 SoC PLLs and Peripheral clock controller dt-bindings.
> Add PLLs and Peripheral clock controller driver for C3 SOC.
> 
> Xianwei Zhao (4):
>   dt-bindings: clock: add Amlogic C3 PLL clock controller bindings
>   dt-bindings: clock: add Amlogic C3 peripherals clock controller
>     bindings
>   clk: meson: C3: add support for the C3 SoC PLL clock
>   clk: meson: c3: add c3 clock peripherals controller driver
> 

This was absolutely never tested :(

It does not look like you tested the bindings, at least after quick
look. Please run `make dt_binding_check` (see
Documentation/devicetree/bindings/writing-schema.rst for instructions).
Maybe you need to update your dtschema and yamllint.

Best regards,
Krzysztof
Xianwei Zhao Oct. 10, 2023, 6:02 a.m. UTC | #2
Hi Krzysztof,
    Thanks, I will fix errors of bindings in next version.

On 2023/9/30 23:53, Krzysztof Kozlowski wrote:
> [ EXTERNAL EMAIL ]
> 
> On 28/09/2023 08:34, Xianwei Zhao wrote:
>> Add C3 SoC PLLs and Peripheral clock controller dt-bindings.
>> Add PLLs and Peripheral clock controller driver for C3 SOC.
>>
>> Xianwei Zhao (4):
>>    dt-bindings: clock: add Amlogic C3 PLL clock controller bindings
>>    dt-bindings: clock: add Amlogic C3 peripherals clock controller
>>      bindings
>>    clk: meson: C3: add support for the C3 SoC PLL clock
>>    clk: meson: c3: add c3 clock peripherals controller driver
>>
> 
> This was absolutely never tested :(
> 
> It does not look like you tested the bindings, at least after quick
> look. Please run `make dt_binding_check` (see
> Documentation/devicetree/bindings/writing-schema.rst for instructions).
> Maybe you need to update your dtschema and yamllint.
> 
> Best regards,
> Krzysztof
>