| Message ID | 20231004195442.414766-1-shenwei.wang@nxp.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [net] net: stmmac: dwmac-imx: request high frequency mode | expand |
On 10/4/23 12:54, Shenwei Wang wrote: > Some i.MX SoCs like the i.mx8mq support adjusting the frequency of the > DDR, AHB, and AXI buses based on system loading. If the dwmac interface > in the driver does not request a HIGH frequency, it can significantly > degrade performance when the system switches to a lower frequency to > conserve power. > > For example, on an i.MX8MQ EVK board, the throughput dropped to around > 100Mbit/s on a 1Gbit connection: > > [ ID] Interval Transfer Bitrate > [ 5] 0.00-10.00 sec 117 MBytes 97.9 Mbits/sec > > However, throughput can return to expected levels after its driver requests > the high frequency mode. Requesting high frequency in the dwmac driver is > essential to maintain full throughput when the i.MX SoC adjusts bus speeds > for power savings. > > Signed-off-by: Mario Castaneda <mario.ignacio.castaneda.lopez@nxp.com> > Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> > Tested-by: Mario Castaneda <mario.ignacio.castaneda.lopez@nxp.com> I assume that you cannot go full dynamic and adjust the bus frequency based upon the negotiated link speed? There may be a need to adjust the bus frequency prior to starting any DMA transfers, otherwise dynamic frequency scaling of the bus may cause all sorts of issues? Regardless of the answer: Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
> -----Original Message----- > From: Florian Fainelli <f.fainelli@gmail.com> > Sent: Wednesday, October 4, 2023 3:00 PM > To: Shenwei Wang <shenwei.wang@nxp.com>; David S. Miller > > Signed-off-by: Mario Castaneda <mario.ignacio.castaneda.lopez@nxp.com> > > Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> > > Tested-by: Mario Castaneda <mario.ignacio.castaneda.lopez@nxp.com> > > I assume that you cannot go full dynamic and adjust the bus frequency based > upon the negotiated link speed? There may be a need to adjust the bus > frequency prior to starting any DMA transfers, otherwise dynamic frequency > scaling of the bus may cause all sorts of issues? Once BUS_FREQ_HIGH is requested, the system will not change the bus frequency when transitioning to a low power state. The hardware supports glitch-free frequency scaling, so blocks like DMA will not be affected during bus frequency adjustments. Regards, Shenwei > > Regardless of the answer: > > Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> > -- > Florian
On Wed, 4 Oct 2023 14:54:42 -0500 Shenwei Wang wrote: > Some i.MX SoCs like the i.mx8mq support adjusting the frequency of the > DDR, AHB, and AXI buses based on system loading. If the dwmac interface > in the driver does not request a HIGH frequency, it can significantly > degrade performance when the system switches to a lower frequency to > conserve power. > > For example, on an i.MX8MQ EVK board, the throughput dropped to around > 100Mbit/s on a 1Gbit connection: > > [ ID] Interval Transfer Bitrate > [ 5] 0.00-10.00 sec 117 MBytes 97.9 Mbits/sec > > However, throughput can return to expected levels after its driver requests > the high frequency mode. Requesting high frequency in the dwmac driver is > essential to maintain full throughput when the i.MX SoC adjusts bus speeds > for power savings. Oh, another one in one day :S Although this one feels much more like a bug that escaped testing because testing didn't use power saving? In any case, do you happen to have a user report you can mention here? Quoting stable rules: | Serious issues as reported by a user of a distribution kernel may also | be considered if they fix a notable performance or interactivity | issue. As these fixes are not as obvious and have a higher risk of a | subtle regression they should only be submitted by a distribution | kernel maintainer and include an addendum linking to a bugzilla entry | if it exists and additional information on the user-visible impact. And a Fixes tag would be good, please add.
On Wed, Oct 04, 2023 at 02:54:42PM -0500, Shenwei Wang wrote: > Some i.MX SoCs like the i.mx8mq support adjusting the frequency of the > DDR, AHB, and AXI buses based on system loading. If the dwmac interface > in the driver does not request a HIGH frequency, it can significantly > degrade performance when the system switches to a lower frequency to > conserve power. > > For example, on an i.MX8MQ EVK board, the throughput dropped to around > 100Mbit/s on a 1Gbit connection: > > [ ID] Interval Transfer Bitrate > [ 5] 0.00-10.00 sec 117 MBytes 97.9 Mbits/sec > > However, throughput can return to expected levels after its driver requests > the high frequency mode. Requesting high frequency in the dwmac driver is > essential to maintain full throughput when the i.MX SoC adjusts bus speeds > for power savings. Isn't this going to cause a power regression? I expect there are applications which expect this behaviour and are happy with 100Mbps. And you are going to change it so their battery goes flatter faster, or they need to run their fan more often. So maybe you need a DT property to always forcing high speed. And as Florian pointed out, maybe you should look at the negotiated speed, and if you have a 10 or 100Mbps link, the MAC does not need high frequency, so why not allow it to be low and safe some power. Andrew
Hello Shenwei, On 04.10.23 21:54, Shenwei Wang wrote: > Some i.MX SoCs like the i.mx8mq support adjusting the frequency of the > DDR, AHB, and AXI buses based on system loading. If the dwmac interface > in the driver does not request a HIGH frequency, it can significantly > degrade performance when the system switches to a lower frequency to > conserve power. > > For example, on an i.MX8MQ EVK board, the throughput dropped to around > 100Mbit/s on a 1Gbit connection: > > [ ID] Interval Transfer Bitrate > [ 5] 0.00-10.00 sec 117 MBytes 97.9 Mbits/sec > > However, throughput can return to expected levels after its driver requests > the high frequency mode. Requesting high frequency in the dwmac driver is > essential to maintain full throughput when the i.MX SoC adjusts bus speeds > for power savings. > > Signed-off-by: Mario Castaneda <mario.ignacio.castaneda.lopez@nxp.com> > Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> > Tested-by: Mario Castaneda <mario.ignacio.castaneda.lopez@nxp.com> > --- > drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c > index 8f730ada71f91..ba6ae0465ecaa 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c > +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c > @@ -6,6 +6,7 @@ > * > */ > > +#include <linux/busfreq-imx.h> > #include <linux/clk.h> > #include <linux/gpio/consumer.h> > #include <linux/kernel.h> > @@ -152,7 +153,9 @@ static int imx_dwmac_clks_config(void *priv, bool enabled) > clk_disable_unprepare(dwmac->clk_mem); > return ret; > } > + request_bus_freq(BUS_FREQ_HIGH); I don't find request_bus_freq in linux-next (next-20231005). AFAIK, it was only ever suggested as RFC and never went beyond that as a reimplmeentation on top of devfreq was requested instead of the i.MX-specific API used in the vendor fork. Did you observe this performance pregression with mainline? Cheers, Ahmad > } else { > + release_bus_freq(BUS_FREQ_HIGH); > clk_disable_unprepare(dwmac->clk_tx); > clk_disable_unprepare(dwmac->clk_mem); > }
Hi Shenwei, kernel test robot noticed the following build errors: [auto build test ERROR on net/main] url: https://github.com/intel-lab-lkp/linux/commits/Shenwei-Wang/net-stmmac-dwmac-imx-request-high-frequency-mode/20231005-035606 base: net/main patch link: https://lore.kernel.org/r/20231004195442.414766-1-shenwei.wang%40nxp.com patch subject: [PATCH net] net: stmmac: dwmac-imx: request high frequency mode config: alpha-allyesconfig (https://download.01.org/0day-ci/archive/20231005/202310051811.Rltsgr8J-lkp@intel.com/config) compiler: alpha-linux-gcc (GCC) 13.2.0 reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20231005/202310051811.Rltsgr8J-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202310051811.Rltsgr8J-lkp@intel.com/ All errors (new ones prefixed by >>): >> drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c:9:10: fatal error: linux/busfreq-imx.h: No such file or directory 9 | #include <linux/busfreq-imx.h> | ^~~~~~~~~~~~~~~~~~~~~ compilation terminated. vim +9 drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c > 9 #include <linux/busfreq-imx.h> 10 #include <linux/clk.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/kernel.h> 13 #include <linux/mfd/syscon.h> 14 #include <linux/module.h> 15 #include <linux/of.h> 16 #include <linux/of_net.h> 17 #include <linux/phy.h> 18 #include <linux/platform_device.h> 19 #include <linux/pm_wakeirq.h> 20 #include <linux/regmap.h> 21 #include <linux/slab.h> 22 #include <linux/stmmac.h> 23
> -----Original Message----- > From: Ahmad Fatoum <a.fatoum@pengutronix.de> > Sent: Thursday, October 5, 2023 1:28 AM > To: Shenwei Wang <shenwei.wang@nxp.com>; David S. Miller > > clk_disable_unprepare(dwmac->clk_mem); > > return ret; > > } > > + request_bus_freq(BUS_FREQ_HIGH); > > I don't find request_bus_freq in linux-next (next-20231005). AFAIK, it was only > ever suggested as RFC and never went beyond that as a reimplmeentation on > top of devfreq was requested instead of the i.MX-specific API used in the vendor > fork. > > Did you observe this performance pregression with mainline? My apologies. I did not realize I was working on a wrong working tree. The busfreq-imx driver hasn't yet gotten upstreamed. Please ignore this patch. Regards, Shenwei > > Cheers, > Ahmad > > > > } else { > > + release_bus_freq(BUS_FREQ_HIGH); > > clk_disable_unprepare(dwmac->clk_tx); > > clk_disable_unprepare(dwmac->clk_mem); > > } > > -- > Pengutronix e.K. | | > Steuerwalder Str. 21 | > http://www.pen/ > gutronix.de%2F&data=05%7C01%7Cshenwei.wang%40nxp.com%7Cbab522390 > 5f542a0cabb08dbc56c406d%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C > 0%7C638320840957133285%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjA > wMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C% > 7C&sdata=kxhSaLbYLmFqYkbN%2BXg1lHfwRbRgWrSNy35BMpcMnSk%3D&reser > ved=0 | > 31137 Hildesheim, Germany | Phone: +49-5121-206917-0 | > Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
Hi Shenwei, kernel test robot noticed the following build errors: [auto build test ERROR on net/main] url: https://github.com/intel-lab-lkp/linux/commits/Shenwei-Wang/net-stmmac-dwmac-imx-request-high-frequency-mode/20231005-035606 base: net/main patch link: https://lore.kernel.org/r/20231004195442.414766-1-shenwei.wang%40nxp.com patch subject: [PATCH net] net: stmmac: dwmac-imx: request high frequency mode config: arm-defconfig (https://download.01.org/0day-ci/archive/20231025/202310250045.xYg3qn6G-lkp@intel.com/config) compiler: clang version 14.0.6 (https://github.com/llvm/llvm-project.git f28c006a5895fc0e329fe15fead81e37457cb1d1) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20231025/202310250045.xYg3qn6G-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot <lkp@intel.com> | Closes: https://lore.kernel.org/oe-kbuild-all/202310250045.xYg3qn6G-lkp@intel.com/ All errors (new ones prefixed by >>): >> drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c:9:10: fatal error: 'linux/busfreq-imx.h' file not found #include <linux/busfreq-imx.h> ^~~~~~~~~~~~~~~~~~~~~ 1 error generated. vim +9 drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c > 9 #include <linux/busfreq-imx.h> 10 #include <linux/clk.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/kernel.h> 13 #include <linux/mfd/syscon.h> 14 #include <linux/module.h> 15 #include <linux/of.h> 16 #include <linux/of_net.h> 17 #include <linux/phy.h> 18 #include <linux/platform_device.h> 19 #include <linux/pm_wakeirq.h> 20 #include <linux/regmap.h> 21 #include <linux/slab.h> 22 #include <linux/stmmac.h> 23
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c index 8f730ada71f91..ba6ae0465ecaa 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c @@ -6,6 +6,7 @@ * */ +#include <linux/busfreq-imx.h> #include <linux/clk.h> #include <linux/gpio/consumer.h> #include <linux/kernel.h> @@ -152,7 +153,9 @@ static int imx_dwmac_clks_config(void *priv, bool enabled) clk_disable_unprepare(dwmac->clk_mem); return ret; } + request_bus_freq(BUS_FREQ_HIGH); } else { + release_bus_freq(BUS_FREQ_HIGH); clk_disable_unprepare(dwmac->clk_tx); clk_disable_unprepare(dwmac->clk_mem); }
Some i.MX SoCs like the i.mx8mq support adjusting the frequency of the DDR, AHB, and AXI buses based on system loading. If the dwmac interface in the driver does not request a HIGH frequency, it can significantly degrade performance when the system switches to a lower frequency to conserve power. For example, on an i.MX8MQ EVK board, the throughput dropped to around 100Mbit/s on a 1Gbit connection: [ ID] Interval Transfer Bitrate [ 5] 0.00-10.00 sec 117 MBytes 97.9 Mbits/sec However, throughput can return to expected levels after its driver requests the high frequency mode. Requesting high frequency in the dwmac driver is essential to maintain full throughput when the i.MX SoC adjusts bus speeds for power savings. Signed-off-by: Mario Castaneda <mario.ignacio.castaneda.lopez@nxp.com> Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com> Tested-by: Mario Castaneda <mario.ignacio.castaneda.lopez@nxp.com> --- drivers/net/ethernet/stmicro/stmmac/dwmac-imx.c | 3 +++ 1 file changed, 3 insertions(+)