| Message ID | 20230922140914.13906-2-phil@philjordan.eu (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | hvf x86 correctness and efficiency improvements | expand |
On Fri, Sep 22, 2023 at 04:09:12PM +0200, Phil Dennis-Jordan wrote: > This patch adds the INVTSC bit to the Hypervisor.framework accelerator's > CPUID bit passthrough allow-list. Previously, specifying +invtsc in the CPU > configuration would fail with the following warning despite the host CPU > advertising the feature: > > qemu-system-x86_64: warning: host doesn't support requested feature: > CPUID.80000007H:EDX.invtsc [bit 8] > > x86 macOS itself relies on a fixed rate TSC for its own Mach absolute time > timestamp mechanism, so there's no reason we can't enable this bit for guests. > Reviewed-by: Roman Bolshakov <roman@roolebo.dev> Tested-by: Roman Bolshakov <roman@roolebo.dev> Regards, Roman
diff --git a/target/i386/hvf/x86_cpuid.c b/target/i386/hvf/x86_cpuid.c index 7323a7a94b..d2721bd2a7 100644 --- a/target/i386/hvf/x86_cpuid.c +++ b/target/i386/hvf/x86_cpuid.c @@ -145,6 +145,10 @@ uint32_t hvf_get_supported_cpuid(uint32_t func, uint32_t idx, CPUID_EXT3_3DNOWPREFETCH | CPUID_EXT3_OSVW | CPUID_EXT3_XOP | CPUID_EXT3_FMA4 | CPUID_EXT3_TBM; break; + case 0x80000007: + edx &= CPUID_APM_INVTSC; + eax = ebx = ecx = 0; + break; default: return 0; }
This patch adds the INVTSC bit to the Hypervisor.framework accelerator's CPUID bit passthrough allow-list. Previously, specifying +invtsc in the CPU configuration would fail with the following warning despite the host CPU advertising the feature: qemu-system-x86_64: warning: host doesn't support requested feature: CPUID.80000007H:EDX.invtsc [bit 8] x86 macOS itself relies on a fixed rate TSC for its own Mach absolute time timestamp mechanism, so there's no reason we can't enable this bit for guests. Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu> --- target/i386/hvf/x86_cpuid.c | 4 ++++ 1 file changed, 4 insertions(+)