Message ID | 20231009-sandbar-botch-0f398fd2e289@wendy (mailing list archive) |
---|---|
State | Superseded |
Delegated to: | Geert Uytterhoeven |
Headers | show |
Series | soc: renesas: select ERRATA_ANDES for R9A07G043 only when alternatives are present | expand |
Hi Conor, On Mon, Oct 9, 2023 at 10:12 AM Conor Dooley <conor.dooley@microchip.com> wrote: > Randy reported a randconfig build issue against linux-next: > WARNING: unmet direct dependencies detected for ERRATA_ANDES > Depends on [n]: RISCV_ALTERNATIVE [=n] && RISCV_SBI [=y] > Selected by [y]: > - ARCH_R9A07G043 [=y] && SOC_RENESAS [=y] && RISCV [=y] && NONPORTABLE [=y] && RISCV_SBI [=y] > > ../arch/riscv/errata/andes/errata.c:59:54: warning: 'struct alt_entry' declared inside parameter list will not be visible outside of this definition or declaration > 59 | void __init_or_module andes_errata_patch_func(struct alt_entry *begin, struct alt_entry *end, > > On RISC-V, alternatives are not usable in XIP kernels, which this > randconfig happened to select. Add a check for whether alternatives are > available before selecting the ERRATA_ANDES config option. > > Reported-by: Randy Dunlap <rdunlap@infradead.org> > Acked-by: Randy Dunlap <rdunlap@infradead.org> > Tested-by: Randy Dunlap <rdunlap@infradead.org> > Closes: https://lore.kernel.org/all/09a6b0f0-76a1-45e3-ab52-329c47393d1d@infradead.org/ > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Thanks for your patch! > --- a/drivers/soc/renesas/Kconfig > +++ b/drivers/soc/renesas/Kconfig > @@ -343,7 +343,7 @@ config ARCH_R9A07G043 > select ARCH_RZG2L > select AX45MP_L2_CACHE if RISCV_DMA_NONCOHERENT > select DMA_GLOBAL_POOL > - select ERRATA_ANDES if RISCV_SBI > + select ERRATA_ANDES if (RISCV_SBI && RISCV_ALTERNATIVE) Perhaps ARCH_R9A07G043 should depend on RISCV_ALTERNATIVE (and RISCV_SBI) instead? It's not like RZ/Five is gonna work without the Andes errata handling present (unless all of them are related to cache handling, and we can run uncached; also see below)). > select ERRATA_ANDES_CMO if ERRATA_ANDES And then this "if" can go as well. Any other hard dependencies? E.g. can RZ/Five work without RISCV_DMA_NONCOHERENT? > help > This enables support for the Renesas RZ/Five SoC. Gr{oetje,eeting}s, Geert
On Mon, Oct 09, 2023 at 10:34:34AM +0200, Geert Uytterhoeven wrote: > Hi Conor, > > On Mon, Oct 9, 2023 at 10:12 AM Conor Dooley <conor.dooley@microchip.com> wrote: > > Randy reported a randconfig build issue against linux-next: > > WARNING: unmet direct dependencies detected for ERRATA_ANDES > > Depends on [n]: RISCV_ALTERNATIVE [=n] && RISCV_SBI [=y] > > Selected by [y]: > > - ARCH_R9A07G043 [=y] && SOC_RENESAS [=y] && RISCV [=y] && NONPORTABLE [=y] && RISCV_SBI [=y] > > > > ../arch/riscv/errata/andes/errata.c:59:54: warning: 'struct alt_entry' declared inside parameter list will not be visible outside of this definition or declaration > > 59 | void __init_or_module andes_errata_patch_func(struct alt_entry *begin, struct alt_entry *end, > > > > On RISC-V, alternatives are not usable in XIP kernels, which this > > randconfig happened to select. Add a check for whether alternatives are > > available before selecting the ERRATA_ANDES config option. > > > > Reported-by: Randy Dunlap <rdunlap@infradead.org> > > Acked-by: Randy Dunlap <rdunlap@infradead.org> > > Tested-by: Randy Dunlap <rdunlap@infradead.org> > > Closes: https://lore.kernel.org/all/09a6b0f0-76a1-45e3-ab52-329c47393d1d@infradead.org/ > > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> > > Thanks for your patch! > > > --- a/drivers/soc/renesas/Kconfig > > +++ b/drivers/soc/renesas/Kconfig > > @@ -343,7 +343,7 @@ config ARCH_R9A07G043 > > select ARCH_RZG2L > > select AX45MP_L2_CACHE if RISCV_DMA_NONCOHERENT > > select DMA_GLOBAL_POOL > > - select ERRATA_ANDES if RISCV_SBI > > + select ERRATA_ANDES if (RISCV_SBI && RISCV_ALTERNATIVE) > > Perhaps ARCH_R9A07G043 should depend on RISCV_ALTERNATIVE (and > RISCV_SBI) instead? It's not like RZ/Five is gonna work without the > Andes errata handling present (unless all of them are related to cache > handling, and we can run uncached; also see below)). > > > select ERRATA_ANDES_CMO if ERRATA_ANDES > > And then this "if" can go as well. > > Any other hard dependencies? > E.g. can RZ/Five work without RISCV_DMA_NONCOHERENT? That seems fair to me, it won't work without any of the above, so it's probably fair game to make them actual dependencies & likely more user friendly since it'll prevent people creating a kernel that cannot function. Cheers, Conor. > > > help > > This enables support for the Renesas RZ/Five SoC. > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds
diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig index 7b74de732718..a97bf8e897cd 100644 --- a/drivers/soc/renesas/Kconfig +++ b/drivers/soc/renesas/Kconfig @@ -343,7 +343,7 @@ config ARCH_R9A07G043 select ARCH_RZG2L select AX45MP_L2_CACHE if RISCV_DMA_NONCOHERENT select DMA_GLOBAL_POOL - select ERRATA_ANDES if RISCV_SBI + select ERRATA_ANDES if (RISCV_SBI && RISCV_ALTERNATIVE) select ERRATA_ANDES_CMO if ERRATA_ANDES help This enables support for the Renesas RZ/Five SoC.