diff mbox series

[1/2] clk: qcom: gpucc-sm8550: switch to clk_lucid_ole_pll_configure

Message ID 20231016084356.1301854-1-dmitry.baryshkov@linaro.org (mailing list archive)
State Accepted
Commit 21134ec8af94981b3127a691df2d73540ba4d8aa
Headers show
Series [1/2] clk: qcom: gpucc-sm8550: switch to clk_lucid_ole_pll_configure | expand

Commit Message

Dmitry Baryshkov Oct. 16, 2023, 8:43 a.m. UTC
Instead of manually specifying the RINGOSC_CAL_L and CAL_L values in the
alpha_pll_config.l field, use the proper clk_lucid_ole_pll_configure()
function to configure the PLL.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/clk/qcom/gpucc-sm8550.c | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

Comments

Konrad Dybcio Oct. 17, 2023, 4:57 p.m. UTC | #1
On 10/16/23 10:43, Dmitry Baryshkov wrote:
> Instead of manually specifying the RINGOSC_CAL_L and CAL_L values in the
> alpha_pll_config.l field, use the proper clk_lucid_ole_pll_configure()
> function to configure the PLL.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Konrad
Bjorn Andersson Oct. 21, 2023, 3:58 p.m. UTC | #2
On Mon, 16 Oct 2023 11:43:55 +0300, Dmitry Baryshkov wrote:
> Instead of manually specifying the RINGOSC_CAL_L and CAL_L values in the
> alpha_pll_config.l field, use the proper clk_lucid_ole_pll_configure()
> function to configure the PLL.
> 
> 

Applied, thanks!

[1/2] clk: qcom: gpucc-sm8550: switch to clk_lucid_ole_pll_configure
      commit: 21134ec8af94981b3127a691df2d73540ba4d8aa
[2/2] clk: qcom: videocc-sm8550: switch to clk_lucid_ole_pll_configure
      commit: a2620539ae2529916a98585c6d7311c48fb67e9f

Best regards,
diff mbox series

Patch

diff --git a/drivers/clk/qcom/gpucc-sm8550.c b/drivers/clk/qcom/gpucc-sm8550.c
index 775e0b931923..420dcb27b47d 100644
--- a/drivers/clk/qcom/gpucc-sm8550.c
+++ b/drivers/clk/qcom/gpucc-sm8550.c
@@ -39,8 +39,7 @@  static const struct pll_vco lucid_ole_vco[] = {
 };
 
 static const struct alpha_pll_config gpu_cc_pll0_config = {
-	/* .l includes RINGOSC_CAL_L_VAL, CAL_L_VAL, L_VAL fields */
-	.l = 0x4444000d,
+	.l = 0x0d,
 	.alpha = 0x0,
 	.config_ctl_val = 0x20485699,
 	.config_ctl_hi_val = 0x00182261,
@@ -71,8 +70,7 @@  static struct clk_alpha_pll gpu_cc_pll0 = {
 };
 
 static const struct alpha_pll_config gpu_cc_pll1_config = {
-	/* .l includes RINGOSC_CAL_L_VAL, CAL_L_VAL, L_VAL fields */
-	.l = 0x44440016,
+	.l = 0x16,
 	.alpha = 0xeaaa,
 	.config_ctl_val = 0x20485699,
 	.config_ctl_hi_val = 0x00182261,
@@ -574,8 +572,8 @@  static int gpu_cc_sm8550_probe(struct platform_device *pdev)
 	if (IS_ERR(regmap))
 		return PTR_ERR(regmap);
 
-	clk_lucid_evo_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config);
-	clk_lucid_evo_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config);
+	clk_lucid_ole_pll_configure(&gpu_cc_pll0, regmap, &gpu_cc_pll0_config);
+	clk_lucid_ole_pll_configure(&gpu_cc_pll1, regmap, &gpu_cc_pll1_config);
 
 	/*
 	 * Keep clocks always enabled: