Message ID | 20231024224056.842607-3-mark.cave-ayland@ilande.co.uk (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | ide: implement simple legacy/native mode switching for PCI IDE controllers | expand |
On Tue, 24 Oct 2023, Mark Cave-Ayland wrote: > The via-ide device currently attempts to set the default BAR addresses to the > values shown in the datasheet, but this doesn't work for 2 reasons: firstly > BARS 1-4 do not set the bottom 2 bits to PCI_BASE_ADDRESS_SPACE_IO, and > secondly the initial PCI bus reset clears the values of all PCI device BARs > after the device itself has been reset. > > Remove the setting of the default BAR addresses from via_ide_reset() to ensure > there is no doubt that these values are never exposed to the guest. Suggested-by: BALATON Zoltan <balaton@eik.bme.hu> this was taken from my original patch so I could also add R-b but being in two tags already is enough so let others listed if they want :-) Regards, BALATON Zoltan > Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> > Tested-by: BALATON Zoltan <balaton@eik.bme.hu> > Tested-by: Bernhard Beschow <shentey@gmail.com> > --- > hw/ide/via.c | 5 ----- > 1 file changed, 5 deletions(-) > > diff --git a/hw/ide/via.c b/hw/ide/via.c > index fff23803a6..87b134083a 100644 > --- a/hw/ide/via.c > +++ b/hw/ide/via.c > @@ -132,11 +132,6 @@ static void via_ide_reset(DeviceState *dev) > pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_FAST_BACK | > PCI_STATUS_DEVSEL_MEDIUM); > > - pci_set_long(pci_conf + PCI_BASE_ADDRESS_0, 0x000001f0); > - pci_set_long(pci_conf + PCI_BASE_ADDRESS_1, 0x000003f4); > - pci_set_long(pci_conf + PCI_BASE_ADDRESS_2, 0x00000170); > - pci_set_long(pci_conf + PCI_BASE_ADDRESS_3, 0x00000374); > - pci_set_long(pci_conf + PCI_BASE_ADDRESS_4, 0x0000cc01); /* BMIBA: 20-23h */ > pci_set_long(pci_conf + PCI_INTERRUPT_LINE, 0x0000010e); > > /* IDE chip enable, IDE configuration 1/2, IDE FIFO Configuration*/ >
diff --git a/hw/ide/via.c b/hw/ide/via.c index fff23803a6..87b134083a 100644 --- a/hw/ide/via.c +++ b/hw/ide/via.c @@ -132,11 +132,6 @@ static void via_ide_reset(DeviceState *dev) pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_FAST_BACK | PCI_STATUS_DEVSEL_MEDIUM); - pci_set_long(pci_conf + PCI_BASE_ADDRESS_0, 0x000001f0); - pci_set_long(pci_conf + PCI_BASE_ADDRESS_1, 0x000003f4); - pci_set_long(pci_conf + PCI_BASE_ADDRESS_2, 0x00000170); - pci_set_long(pci_conf + PCI_BASE_ADDRESS_3, 0x00000374); - pci_set_long(pci_conf + PCI_BASE_ADDRESS_4, 0x0000cc01); /* BMIBA: 20-23h */ pci_set_long(pci_conf + PCI_INTERRUPT_LINE, 0x0000010e); /* IDE chip enable, IDE configuration 1/2, IDE FIFO Configuration*/