diff mbox series

[RFC,v3,RESEND,02/13] irqchip/riscv-intc: Allow large non-standard hwirq number

Message ID 20231023004100.2663486-3-peterlin@andestech.com (mailing list archive)
State New, archived
Headers show
Series Support Andes PMU extension | expand

Commit Message

Yu-Chien Peter Lin Oct. 23, 2023, 12:40 a.m. UTC 
Currently, the implementation of the RISC-V INTC driver uses the
interrupt cause as hwirq and has a limitation of supporting a
maximum of 64 hwirqs. However, according to the privileged spec,
interrupt causes >= 16 are defined for platform use.

This limitation prevents us from fully utilizing the available
local interrupt sources. Additionally, the hwirqs used on RISC-V
are sparse, with only interrupt numbers 1, 5 and 9 (plus Sscofpmf
or T-Head's PMU irq) being currently used for supervisor mode.

The patch switches to using irq_domain_create_tree() which
creates the radix tree map, allowing us to handle a larger
number of hwirqs.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Charles Ci-Jyun Wu <dminus@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
---
Changes v1 -> v2:
  - Fixed irq mapping failure checking (suggested by Clément and Anup)
Changes v2 -> v3:
  - No change
---
 drivers/irqchip/irq-riscv-intc.c | 12 ++++--------
 1 file changed, 4 insertions(+), 8 deletions(-)

Comments

Thomas Gleixner Oct. 27, 2023, 7:12 a.m. UTC | #1 
On Mon, Oct 23 2023 at 08:40, Yu Chien Peter Lin wrote:
> Currently, the implementation of the RISC-V INTC driver uses the
> interrupt cause as hwirq and has a limitation of supporting a
> maximum of 64 hwirqs. However, according to the privileged spec,
> interrupt causes >= 16 are defined for platform use.
>
> This limitation prevents us from fully utilizing the available
> local interrupt sources. Additionally, the hwirqs used on RISC-V
> are sparse, with only interrupt numbers 1, 5 and 9 (plus Sscofpmf
> or T-Head's PMU irq) being currently used for supervisor mode.
>
> The patch switches to using irq_domain_create_tree() which

git grep "This patch" Documentation/process/

> creates the radix tree map, allowing us to handle a larger
> number of hwirqs.

Who is 'us'? We are not part of the chip and please write out 'hardware
interrupts'

> @@ -24,10 +24,8 @@ static asmlinkage void riscv_intc_irq(struct pt_regs *regs)
>  {
>  	unsigned long cause = regs->cause & ~CAUSE_IRQ_FLAG;
>  
> -	if (unlikely(cause >= BITS_PER_LONG))
> -		panic("unexpected interrupt cause");
> -
> -	generic_handle_domain_irq(intc_domain, cause);
> +	if (generic_handle_domain_irq(intc_domain, cause))
> +		pr_warn("Failed to handle interrupt (cause: %ld)\n", cause);

pr_warn_once() or at least pr_warn_ratelimited().

>  }
>  
>  /*
> @@ -117,8 +115,8 @@ static int __init riscv_intc_init_common(struct fwnode_handle *fn)
>  {
>  	int rc;
>  
> -	intc_domain = irq_domain_create_linear(fn, BITS_PER_LONG,
> -					       &riscv_intc_domain_ops, NULL);
> +	intc_domain = irq_domain_create_tree(fn, &riscv_intc_domain_ops,
> +					     NULL);

Put it into one line. Linebreaking arguments is really only required
when the line length is exceedingly long. This one is not.
Yu-Chien Peter Lin Oct. 30, 2023, 7:12 a.m. UTC | #2 
Hi Thomas,

Thanks for the review.

On Fri, Oct 27, 2023 at 09:12:59AM +0200, Thomas Gleixner wrote:
> On Mon, Oct 23 2023 at 08:40, Yu Chien Peter Lin wrote:
> > Currently, the implementation of the RISC-V INTC driver uses the
> > interrupt cause as hwirq and has a limitation of supporting a
> > maximum of 64 hwirqs. However, according to the privileged spec,
> > interrupt causes >= 16 are defined for platform use.
> >
> > This limitation prevents us from fully utilizing the available
> > local interrupt sources. Additionally, the hwirqs used on RISC-V
> > are sparse, with only interrupt numbers 1, 5 and 9 (plus Sscofpmf
> > or T-Head's PMU irq) being currently used for supervisor mode.
> >
> > The patch switches to using irq_domain_create_tree() which
> 
> git grep "This patch" Documentation/process/

Sure, will fix.

> > creates the radix tree map, allowing us to handle a larger
> > number of hwirqs.
> 
> Who is 'us'? We are not part of the chip and please write out 'hardware
> interrupts'

OK!

> > @@ -24,10 +24,8 @@ static asmlinkage void riscv_intc_irq(struct pt_regs *regs)
> >  {
> >  	unsigned long cause = regs->cause & ~CAUSE_IRQ_FLAG;
> >  
> > -	if (unlikely(cause >= BITS_PER_LONG))
> > -		panic("unexpected interrupt cause");
> > -
> > -	generic_handle_domain_irq(intc_domain, cause);
> > +	if (generic_handle_domain_irq(intc_domain, cause))
> > +		pr_warn("Failed to handle interrupt (cause: %ld)\n", cause);
> 
> pr_warn_once() or at least pr_warn_ratelimited().

OK!

> >  }
> >  
> >  /*
> > @@ -117,8 +115,8 @@ static int __init riscv_intc_init_common(struct fwnode_handle *fn)
> >  {
> >  	int rc;
> >  
> > -	intc_domain = irq_domain_create_linear(fn, BITS_PER_LONG,
> > -					       &riscv_intc_domain_ops, NULL);
> > +	intc_domain = irq_domain_create_tree(fn, &riscv_intc_domain_ops,
> > +					     NULL);
> 
> Put it into one line. Linebreaking arguments is really only required
> when the line length is exceedingly long. This one is not.

OK! will fix.

Thanks,
Peter Lin
diff mbox series

Patch

diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c
index e8d01b14ccdd..79d049105384 100644
--- a/drivers/irqchip/irq-riscv-intc.c
+++ b/drivers/irqchip/irq-riscv-intc.c
@@ -24,10 +24,8 @@  static asmlinkage void riscv_intc_irq(struct pt_regs *regs)
 {
 	unsigned long cause = regs->cause & ~CAUSE_IRQ_FLAG;
 
-	if (unlikely(cause >= BITS_PER_LONG))
-		panic("unexpected interrupt cause");
-
-	generic_handle_domain_irq(intc_domain, cause);
+	if (generic_handle_domain_irq(intc_domain, cause))
+		pr_warn("Failed to handle interrupt (cause: %ld)\n", cause);
 }
 
 /*
@@ -117,8 +115,8 @@  static int __init riscv_intc_init_common(struct fwnode_handle *fn)
 {
 	int rc;
 
-	intc_domain = irq_domain_create_linear(fn, BITS_PER_LONG,
-					       &riscv_intc_domain_ops, NULL);
+	intc_domain = irq_domain_create_tree(fn, &riscv_intc_domain_ops,
+					     NULL);
 	if (!intc_domain) {
 		pr_err("unable to add IRQ domain\n");
 		return -ENXIO;
@@ -132,8 +130,6 @@  static int __init riscv_intc_init_common(struct fwnode_handle *fn)
 
 	riscv_set_intc_hwnode_fn(riscv_intc_hwnode);
 
-	pr_info("%d local interrupts mapped\n", BITS_PER_LONG);
-
 	return 0;
 }