| Message ID | 20231110094553.2361842-1-yangcong5@huaqin.corp-partner.google.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/panel: boe-tv101wum-nl6: Fine tune Himax83102-j02 panel HFP and HBP | expand |
Hi, On Fri, Nov 10, 2023 at 1:46 AM Cong Yang <yangcong5@huaqin.corp-partner.google.com> wrote: > > The refresh reported by modotest is 60.46Hz, and the actual measurement s/modotets/modetest/ > is 60.01Hz, which is outside the expected tolerance. Adjust hporch and > pixel clock to fix it. After repair, modetest and actual measurement were > all 60.01Hz. Can you explain this more? Why was the rate that modetest reported different from the actual measured rate? This feels like it's a problem with your MIPI controller not being able to accurately make the rate. Is that it? If so then this is a bit of a hack. Someone else using the same panel might have a MIPI controller that can make slightly different clock rates. I think you're currently the only user of the panel, so maybe this isn't too terrible (would love to hear other people's advice). Assuming this is actually the problem there are probably at least several different ways to solve this. One that comes to mind is the solution we ended up with for eDP where we allowed specifying some of this stuff in the device tree, though that might cause a whole pile of debates... In any case, as I said above this patch is probably OK if you're the only user of this panel, but it might be at least good to add something to the commit message? -Doug
Hi, On Sat, Nov 11, 2023 at 5:10 AM Doug Anderson <dianders@google.com> wrote: > > Hi, > > On Fri, Nov 10, 2023 at 1:46 AM Cong Yang > <yangcong5@huaqin.corp-partner.google.com> wrote: > > > > The refresh reported by modotest is 60.46Hz, and the actual measurement > > s/modotets/modetest/ > > > is 60.01Hz, which is outside the expected tolerance. Adjust hporch and > > pixel clock to fix it. After repair, modetest and actual measurement were > > all 60.01Hz. > > Can you explain this more? Why was the rate that modetest reported > different from the actual measured rate? This feels like it's a > problem with your MIPI controller not being able to accurately make > the rate. Is that it? modetest refresh = Pixel CLK/ htotal * vtotal measurement HS->LP cycle time = Vblanking According to the vendor's feedback, the actual measured frame rate is not only affected by Htotal/Vtotal/pixel clock, Lane-num/PixelBit/LineTime also affected. It seems that if change to a different SOC platform, may need to readjust these parameters. > > If so then this is a bit of a hack. Someone else using the same panel > might have a MIPI controller that can make slightly different clock > rates. I think you're currently the only user of the panel, so maybe > this isn't too terrible (would love to hear other people's advice). > > Assuming this is actually the problem there are probably at least > several different ways to solve this. One that comes to mind is the > solution we ended up with for eDP where we allowed specifying some of > this stuff in the device tree, though that might cause a whole pile of > debates... > > In any case, as I said above this patch is probably OK if you're the > only user of this panel, but it might be at least good to add > something to the commit message? OK, I'll add some instructions in V2. Thanks. > > -Doug
diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c index 4f370bc6dca8..5f7e7dee8a82 100644 --- a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c +++ b/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c @@ -1768,11 +1768,11 @@ static const struct panel_desc starry_qfh032011_53g_desc = { }; static const struct drm_display_mode starry_himax83102_j02_default_mode = { - .clock = 161600, + .clock = 162850, .hdisplay = 1200, - .hsync_start = 1200 + 40, - .hsync_end = 1200 + 40 + 20, - .htotal = 1200 + 40 + 20 + 40, + .hsync_start = 1200 + 50, + .hsync_end = 1200 + 50 + 20, + .htotal = 1200 + 50 + 20 + 50, .vdisplay = 1920, .vsync_start = 1920 + 116, .vsync_end = 1920 + 116 + 8,
The refresh reported by modotest is 60.46Hz, and the actual measurement is 60.01Hz, which is outside the expected tolerance. Adjust hporch and pixel clock to fix it. After repair, modetest and actual measurement were all 60.01Hz. Fixes: 1bc2ef065f13 ("drm/panel: Support for Starry-himax83102-j02 TDDI MIPI-DSI panel") Signed-off-by: Cong Yang <yangcong5@huaqin.corp-partner.google.com> --- drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)