diff mbox series

[v2] arm64: dts: qcom: ipq6018: add QUP5 I2C node

Message ID CACDmYyfOe-jcgj4BAD8=pr08sHpOF=+FRcwrouuLAVsa4+zwtw@mail.gmail.com (mailing list archive)
State Accepted
Headers show
Series [v2] arm64: dts: qcom: ipq6018: add QUP5 I2C node | expand

Commit Message

Isaev Ruslan Nov. 15, 2023, 3:38 p.m. UTC
Add node to support this bus inside of IPQ6018.
For example, this bus is used to work with the
voltage regulator (mp5496) on the Yuncore AX840 wireless AP.


Signed-off-by: Isaev Ruslan <legale.legale@gmail.com>
---
v1 -> v2: fix clocks typo; fix reg size warning.


 arch/arm64/boot/dts/qcom/ipq6018.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

--
2.42.0

Comments

Konrad Dybcio Nov. 15, 2023, 5:04 p.m. UTC | #1
On 11/15/23 16:38, Isaev Ruslan wrote:
> Add node to support this bus inside of IPQ6018.
> For example, this bus is used to work with the
> voltage regulator (mp5496) on the Yuncore AX840 wireless AP.
> 
> 
> Signed-off-by: Isaev Ruslan <legale.legale@gmail.com>
> ---
> v1 -> v2: fix clocks typo; fix reg size warning.
Hi, it's also good practice to share a link to the previous
revision for easier comparison. The b4 tool [1] takes care
of most of the comments you've got.

>   arch/arm64/boot/dts/qcom/ipq6018.dtsi | 15 +++++++++++++++
>   1 file changed, 15 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> index e59b9df96..00a61de9d 100644
> --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
> @@ -506,6 +506,21 @@ blsp1_i2c3: i2c@78b7000 {
>                          dma-names = "tx", "rx";
>                          status = "disabled";
>                  };
> +
> +               blsp1_i2c6: i2c@78ba000 {
> +                       compatible = "qcom,i2c-qup-v2.2.1";
> +                       #address-cells = <1>;
> +                       #size-cells = <0>;
> +                       reg = <0x0 0x078ba000 0x0 0x600>;
> +                       interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
The irq number seems a bit sus.. they're usually more or less contiguous
and I2C3 uses SPI97.. Are you sure it's the correct one?

Konrad

[1] https://b4.docs.kernel.org/en/latest/
Bryan O'Donoghue Nov. 15, 2023, 5:07 p.m. UTC | #2
On 15/11/2023 15:38, Isaev Ruslan wrote:
> v1 -> v2: fix clocks typo; fix reg size warning. 
> arch/arm64/boot/dts/qcom/ipq6018.dtsi | 15 +++++++++++++++ 1 file 
> changed, 15 insertions(+) diff --git 
> a/arch/arm64/boot/dts/qcom/ipq6018.dtsi 
> b/arch/arm64/boot/dts/qcom/ipq6018.dtsi

When you added the v1 -> v2 to the patch you also caused a newline which 
prevents patch application.

Try

"git format-patch HEAD~"

then

git reset --hard HEAD~

then

git am < your-patch.patch

Resend when that works

---
bod
Bjorn Andersson Feb. 7, 2024, 4:46 a.m. UTC | #3
On Wed, 15 Nov 2023 18:38:53 +0300, Isaev Ruslan wrote:
> Add node to support this bus inside of IPQ6018.
> For example, this bus is used to work with the
> voltage regulator (mp5496) on the Yuncore AX840 wireless AP.
> 
> 

Applied, thanks!

[1/1] arm64: dts: qcom: ipq6018: add QUP5 I2C node
      commit: cc3cfef3e3d942f73fe8adc26105bccdb296ec52

Best regards,
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
index e59b9df96..00a61de9d 100644
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -506,6 +506,21 @@  blsp1_i2c3: i2c@78b7000 {
                        dma-names = "tx", "rx";
                        status = "disabled";
                };
+
+               blsp1_i2c6: i2c@78ba000 {
+                       compatible = "qcom,i2c-qup-v2.2.1";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       reg = <0x0 0x078ba000 0x0 0x600>;
+                       interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>,
+                                <&gcc GCC_BLSP1_AHB_CLK>;
+                       clock-names = "core", "iface";
+                       clock-frequency = <400000>;
+                       dmas = <&blsp_dma 22>, <&blsp_dma 23>;
+                       dma-names = "tx", "rx";
+                       status = "disabled";
+               };

                qpic_bam: dma-controller@7984000 {
                        compatible = "qcom,bam-v1.7.0";