| Message ID | 20231110112533.2499437-2-lcherian@marvell.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Coresight for Kernel panic and watchdog reset | expand |
On Fri, 10 Nov 2023 16:55:27 +0530, Linu Cherian wrote: > memory-region 0: Reserved trace buffer memory > > TMC ETR: When available, use this reserved memory region for > trace data capture. Same region is used for trace data > retention after a panic or watchdog reset. > > TMC ETF: When available, use this reserved memory region for > trace data retention synced from internal SRAM after a panic or > watchdog reset. > > memory-region 1: Reserved meta data memory > > TMC ETR, ETF: When available, use this memory for register > snapshot retention synced from hardware registers after a panic > or watchdog reset. > > Signed-off-by: Linu Cherian <lcherian@marvell.com> > --- > Changelog from v4: > * Description is more explicit on the usage of reserved trace buffer > regions > * Removed "mem" suffix from the memory region names > > .../bindings/arm/arm,coresight-tmc.yaml | 25 +++++++++++++++++++ > 1 file changed, 25 insertions(+) > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml b/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml index cb8dceaca70e..6d266ac0016b 100644 --- a/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml +++ b/Documentation/devicetree/bindings/arm/arm,coresight-tmc.yaml @@ -101,6 +101,28 @@ properties: and ETF configurations. $ref: /schemas/graph.yaml#/properties/port + memory-region: + items: + - description: Reserved trace buffer memory for ETR and ETF sinks. + For ETR, this reserved memory region is used for trace data capture. + Same region is used for trace data retention as well after a panic + or watchdog reset. + This reserved memory region is used as trace buffer or used for trace + data retention only if specifically selected by the user in sysfs + interface. + The default memory usage models for ETR in sysfs/perf modes are + otherwise unaltered. + + For ETF, this reserved memory region is used by default for + retention of trace data synced from internal SRAM after a panic + or watchdog reset. + - description: Reserved meta data memory. Used for ETR and ETF sinks + for storing metadata. + memory-region-names: + items: + - const: tracedata + - const: metadata + required: - compatible - reg @@ -115,6 +137,9 @@ examples: etr@20070000 { compatible = "arm,coresight-tmc", "arm,primecell"; reg = <0x20070000 0x1000>; + memory-region = <&etr_trace_mem_reserved>, + <&etr_mdata_mem_reserved>; + memory-region-names = "tracedata", "metadata"; clocks = <&oscclk6a>; clock-names = "apb_pclk";
memory-region 0: Reserved trace buffer memory TMC ETR: When available, use this reserved memory region for trace data capture. Same region is used for trace data retention after a panic or watchdog reset. TMC ETF: When available, use this reserved memory region for trace data retention synced from internal SRAM after a panic or watchdog reset. memory-region 1: Reserved meta data memory TMC ETR, ETF: When available, use this memory for register snapshot retention synced from hardware registers after a panic or watchdog reset. Signed-off-by: Linu Cherian <lcherian@marvell.com> --- Changelog from v4: * Description is more explicit on the usage of reserved trace buffer regions * Removed "mem" suffix from the memory region names .../bindings/arm/arm,coresight-tmc.yaml | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+)