| Message ID | 20231123181300.2140622-1-christoph.muellner@vrull.eu (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2] linux-user/riscv: Add Zicboz extensions to hwprobe | expand |
On 11/23/23 15:12, Christoph Muellner wrote: > From: Christoph Müllner <christoph.muellner@vrull.eu> > > Upstream Linux recently added RISC-V Zicboz support to the hwprobe API. > This patch introduces this for QEMU's user space emulator. > > Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu> > --- Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> > linux-user/syscall.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/linux-user/syscall.c b/linux-user/syscall.c > index 65ac3ac796..2f9a1c5279 100644 > --- a/linux-user/syscall.c > +++ b/linux-user/syscall.c > @@ -8799,6 +8799,7 @@ static int do_getdents64(abi_long dirfd, abi_long arg2, abi_long count) > #define RISCV_HWPROBE_EXT_ZBA (1 << 3) > #define RISCV_HWPROBE_EXT_ZBB (1 << 4) > #define RISCV_HWPROBE_EXT_ZBS (1 << 5) > +#define RISCV_HWPROBE_EXT_ZICBOZ (1 << 6) > > #define RISCV_HWPROBE_KEY_CPUPERF_0 5 > #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) > @@ -8855,6 +8856,8 @@ static void risc_hwprobe_fill_pairs(CPURISCVState *env, > RISCV_HWPROBE_EXT_ZBB : 0; > value |= cfg->ext_zbs ? > RISCV_HWPROBE_EXT_ZBS : 0; > + value |= cfg->ext_zicboz ? > + RISCV_HWPROBE_EXT_ZICBOZ : 0; > __put_user(value, &pair->value); > break; > case RISCV_HWPROBE_KEY_CPUPERF_0:
On Thu, Nov 23, 2023 at 07:12:59PM +0100, Christoph Muellner wrote: > From: Christoph Müllner <christoph.muellner@vrull.eu> > > Upstream Linux recently added RISC-V Zicboz support to the hwprobe API. > This patch introduces this for QEMU's user space emulator. > > Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu> > --- > linux-user/syscall.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/linux-user/syscall.c b/linux-user/syscall.c > index 65ac3ac796..2f9a1c5279 100644 > --- a/linux-user/syscall.c > +++ b/linux-user/syscall.c > @@ -8799,6 +8799,7 @@ static int do_getdents64(abi_long dirfd, abi_long arg2, abi_long count) > #define RISCV_HWPROBE_EXT_ZBA (1 << 3) > #define RISCV_HWPROBE_EXT_ZBB (1 << 4) > #define RISCV_HWPROBE_EXT_ZBS (1 << 5) > +#define RISCV_HWPROBE_EXT_ZICBOZ (1 << 6) > > #define RISCV_HWPROBE_KEY_CPUPERF_0 5 > #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) > @@ -8855,6 +8856,8 @@ static void risc_hwprobe_fill_pairs(CPURISCVState *env, > RISCV_HWPROBE_EXT_ZBB : 0; > value |= cfg->ext_zbs ? > RISCV_HWPROBE_EXT_ZBS : 0; > + value |= cfg->ext_zicboz ? > + RISCV_HWPROBE_EXT_ZICBOZ : 0; > __put_user(value, &pair->value); > break; > case RISCV_HWPROBE_KEY_CPUPERF_0: > -- > 2.41.0 > > We should also add support for getting the block size with RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE. Thanks, drew
On Fri, Nov 24, 2023 at 5:59 PM Andrew Jones <ajones@ventanamicro.com> wrote: > > On Thu, Nov 23, 2023 at 07:12:59PM +0100, Christoph Muellner wrote: > > From: Christoph Müllner <christoph.muellner@vrull.eu> > > > > Upstream Linux recently added RISC-V Zicboz support to the hwprobe API. > > This patch introduces this for QEMU's user space emulator. > > > > Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu> > > --- > > linux-user/syscall.c | 3 +++ > > 1 file changed, 3 insertions(+) > > > > diff --git a/linux-user/syscall.c b/linux-user/syscall.c > > index 65ac3ac796..2f9a1c5279 100644 > > --- a/linux-user/syscall.c > > +++ b/linux-user/syscall.c > > @@ -8799,6 +8799,7 @@ static int do_getdents64(abi_long dirfd, abi_long arg2, abi_long count) > > #define RISCV_HWPROBE_EXT_ZBA (1 << 3) > > #define RISCV_HWPROBE_EXT_ZBB (1 << 4) > > #define RISCV_HWPROBE_EXT_ZBS (1 << 5) > > +#define RISCV_HWPROBE_EXT_ZICBOZ (1 << 6) > > > > #define RISCV_HWPROBE_KEY_CPUPERF_0 5 > > #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) > > @@ -8855,6 +8856,8 @@ static void risc_hwprobe_fill_pairs(CPURISCVState *env, > > RISCV_HWPROBE_EXT_ZBB : 0; > > value |= cfg->ext_zbs ? > > RISCV_HWPROBE_EXT_ZBS : 0; > > + value |= cfg->ext_zicboz ? > > + RISCV_HWPROBE_EXT_ZICBOZ : 0; > > __put_user(value, &pair->value); > > break; > > case RISCV_HWPROBE_KEY_CPUPERF_0: > > -- > > 2.41.0 > > > > > > We should also add support for getting the block size with > RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE. Hi Andrew, this is already upstream, just the EXT_ZICBOZ is missing: commit 301c65f49f9602f39b9f3ce0ad9ff70d4bda7226 Author: Palmer Dabbelt <palmer@rivosinc.com> Date: Fri Nov 10 09:37:16 2023 -0800 linux-user/riscv: Add Zicboz block size to hwprobe Support for probing the Zicboz block size landed in Linux 6.6, which was released a few weeks ago. This provides the user-configured block size when Zicboz is enabled. > > Thanks, > drew
On Fri, Nov 24, 2023 at 06:41:25PM +0100, Christoph Müllner wrote: > On Fri, Nov 24, 2023 at 5:59 PM Andrew Jones <ajones@ventanamicro.com> wrote: > > > > On Thu, Nov 23, 2023 at 07:12:59PM +0100, Christoph Muellner wrote: > > > From: Christoph Müllner <christoph.muellner@vrull.eu> > > > > > > Upstream Linux recently added RISC-V Zicboz support to the hwprobe API. > > > This patch introduces this for QEMU's user space emulator. > > > > > > Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu> > > > --- > > > linux-user/syscall.c | 3 +++ > > > 1 file changed, 3 insertions(+) > > > > > > diff --git a/linux-user/syscall.c b/linux-user/syscall.c > > > index 65ac3ac796..2f9a1c5279 100644 > > > --- a/linux-user/syscall.c > > > +++ b/linux-user/syscall.c > > > @@ -8799,6 +8799,7 @@ static int do_getdents64(abi_long dirfd, abi_long arg2, abi_long count) > > > #define RISCV_HWPROBE_EXT_ZBA (1 << 3) > > > #define RISCV_HWPROBE_EXT_ZBB (1 << 4) > > > #define RISCV_HWPROBE_EXT_ZBS (1 << 5) > > > +#define RISCV_HWPROBE_EXT_ZICBOZ (1 << 6) > > > > > > #define RISCV_HWPROBE_KEY_CPUPERF_0 5 > > > #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) > > > @@ -8855,6 +8856,8 @@ static void risc_hwprobe_fill_pairs(CPURISCVState *env, > > > RISCV_HWPROBE_EXT_ZBB : 0; > > > value |= cfg->ext_zbs ? > > > RISCV_HWPROBE_EXT_ZBS : 0; > > > + value |= cfg->ext_zicboz ? > > > + RISCV_HWPROBE_EXT_ZICBOZ : 0; > > > __put_user(value, &pair->value); > > > break; > > > case RISCV_HWPROBE_KEY_CPUPERF_0: > > > -- > > > 2.41.0 > > > > > > > > > > We should also add support for getting the block size with > > RISCV_HWPROBE_KEY_ZICBOZ_BLOCK_SIZE. > > Hi Andrew, this is already upstream, just the EXT_ZICBOZ is missing: Oh, thanks. In that case, Reviewed-by: Andrew Jones <ajones@ventanamicro.com> drew
On Mon, Nov 27, 2023 at 12:37 AM Christoph Muellner <christoph.muellner@vrull.eu> wrote: > > From: Christoph Müllner <christoph.muellner@vrull.eu> > > Upstream Linux recently added RISC-V Zicboz support to the hwprobe API. > This patch introduces this for QEMU's user space emulator. > > Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu> Thanks! Applied to riscv-to-apply.next Alistair > --- > linux-user/syscall.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/linux-user/syscall.c b/linux-user/syscall.c > index 65ac3ac796..2f9a1c5279 100644 > --- a/linux-user/syscall.c > +++ b/linux-user/syscall.c > @@ -8799,6 +8799,7 @@ static int do_getdents64(abi_long dirfd, abi_long arg2, abi_long count) > #define RISCV_HWPROBE_EXT_ZBA (1 << 3) > #define RISCV_HWPROBE_EXT_ZBB (1 << 4) > #define RISCV_HWPROBE_EXT_ZBS (1 << 5) > +#define RISCV_HWPROBE_EXT_ZICBOZ (1 << 6) > > #define RISCV_HWPROBE_KEY_CPUPERF_0 5 > #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) > @@ -8855,6 +8856,8 @@ static void risc_hwprobe_fill_pairs(CPURISCVState *env, > RISCV_HWPROBE_EXT_ZBB : 0; > value |= cfg->ext_zbs ? > RISCV_HWPROBE_EXT_ZBS : 0; > + value |= cfg->ext_zicboz ? > + RISCV_HWPROBE_EXT_ZICBOZ : 0; > __put_user(value, &pair->value); > break; > case RISCV_HWPROBE_KEY_CPUPERF_0: > -- > 2.41.0 > >
On Wed, Dec 6, 2023 at 1:57 AM Alistair Francis <alistair23@gmail.com> wrote: > > On Mon, Nov 27, 2023 at 12:37 AM Christoph Muellner > <christoph.muellner@vrull.eu> wrote: > > > > From: Christoph Müllner <christoph.muellner@vrull.eu> > > > > Upstream Linux recently added RISC-V Zicboz support to the hwprobe API. > > This patch introduces this for QEMU's user space emulator. > > > > Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu> > > Thanks! > > Applied to riscv-to-apply.next I just saw that this did not land yet on master. I also noticed that this patch is not in https://github.com/alistair23/qemu/tree/riscv-to-apply.next or https://github.com/alistair23/qemu/commits/riscv-to-apply.for-upstream. Was there some issue with the patch? Meanwhile a lot of additional extensions got defined in the hwprobe interface (patches are already merged in the kernel). I'll send out a patch for these in a few minutes and include this patch here as well. BR Christoph > > Alistair > > > --- > > linux-user/syscall.c | 3 +++ > > 1 file changed, 3 insertions(+) > > > > diff --git a/linux-user/syscall.c b/linux-user/syscall.c > > index 65ac3ac796..2f9a1c5279 100644 > > --- a/linux-user/syscall.c > > +++ b/linux-user/syscall.c > > @@ -8799,6 +8799,7 @@ static int do_getdents64(abi_long dirfd, abi_long arg2, abi_long count) > > #define RISCV_HWPROBE_EXT_ZBA (1 << 3) > > #define RISCV_HWPROBE_EXT_ZBB (1 << 4) > > #define RISCV_HWPROBE_EXT_ZBS (1 << 5) > > +#define RISCV_HWPROBE_EXT_ZICBOZ (1 << 6) > > > > #define RISCV_HWPROBE_KEY_CPUPERF_0 5 > > #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) > > @@ -8855,6 +8856,8 @@ static void risc_hwprobe_fill_pairs(CPURISCVState *env, > > RISCV_HWPROBE_EXT_ZBB : 0; > > value |= cfg->ext_zbs ? > > RISCV_HWPROBE_EXT_ZBS : 0; > > + value |= cfg->ext_zicboz ? > > + RISCV_HWPROBE_EXT_ZICBOZ : 0; > > __put_user(value, &pair->value); > > break; > > case RISCV_HWPROBE_KEY_CPUPERF_0: > > -- > > 2.41.0 > > > >
diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 65ac3ac796..2f9a1c5279 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -8799,6 +8799,7 @@ static int do_getdents64(abi_long dirfd, abi_long arg2, abi_long count) #define RISCV_HWPROBE_EXT_ZBA (1 << 3) #define RISCV_HWPROBE_EXT_ZBB (1 << 4) #define RISCV_HWPROBE_EXT_ZBS (1 << 5) +#define RISCV_HWPROBE_EXT_ZICBOZ (1 << 6) #define RISCV_HWPROBE_KEY_CPUPERF_0 5 #define RISCV_HWPROBE_MISALIGNED_UNKNOWN (0 << 0) @@ -8855,6 +8856,8 @@ static void risc_hwprobe_fill_pairs(CPURISCVState *env, RISCV_HWPROBE_EXT_ZBB : 0; value |= cfg->ext_zbs ? RISCV_HWPROBE_EXT_ZBS : 0; + value |= cfg->ext_zicboz ? + RISCV_HWPROBE_EXT_ZICBOZ : 0; __put_user(value, &pair->value); break; case RISCV_HWPROBE_KEY_CPUPERF_0: