diff mbox series

[v7,5/8] hw/arm/virt: Check CPU type in machine_run_board_init()

Message ID 20231126231210.112820-6-gshan@redhat.com (mailing list archive)
State New, archived
Headers show
Series Unified CPU type check | expand

Commit Message

Gavin Shan Nov. 26, 2023, 11:12 p.m. UTC
Set mc->valid_cpu_types so that the user specified CPU type can be
validated in machine_run_board_init(). We needn't to do the check
by ourselves.

Signed-off-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
 hw/arm/virt.c | 62 +++++++++++++++++++--------------------------------
 1 file changed, 23 insertions(+), 39 deletions(-)

Comments

Marcin Juszkiewicz Nov. 27, 2023, 10:13 a.m. UTC | #1
W dniu 27.11.2023 o 00:12, Gavin Shan pisze:
> @@ -2939,6 +2900,28 @@ static void virt_machine_class_init(ObjectClass *oc, void *data)
>   {
>       MachineClass *mc = MACHINE_CLASS(oc);
>       HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
> +    static const char * const valid_cpu_types[] = {
> +#ifdef CONFIG_TCG
> +        ARM_CPU_TYPE_NAME("cortex-a7"),
> +        ARM_CPU_TYPE_NAME("cortex-a15"),
> +        ARM_CPU_TYPE_NAME("cortex-a35"),
> +        ARM_CPU_TYPE_NAME("cortex-a55"),
> +        ARM_CPU_TYPE_NAME("cortex-a72"),
> +        ARM_CPU_TYPE_NAME("cortex-a76"),
> +        ARM_CPU_TYPE_NAME("cortex-a710"),
> +        ARM_CPU_TYPE_NAME("a64fx"),
> +        ARM_CPU_TYPE_NAME("neoverse-n1"),
> +        ARM_CPU_TYPE_NAME("neoverse-v1"),
> +        ARM_CPU_TYPE_NAME("neoverse-n2"),
> +#endif
> +        ARM_CPU_TYPE_NAME("cortex-a53"),
> +        ARM_CPU_TYPE_NAME("cortex-a57"),
> +#if defined(CONFIG_KVM) || defined(CONFIG_HVF)
> +        ARM_CPU_TYPE_NAME("host"),
> +#endif
> +        ARM_CPU_TYPE_NAME("max"),
> +        NULL
> +    };

I understand that you just move list from one place to the other but 
also wonder why a53/a57 were/are outside of 'ifdef CONFIG_TCG' check.
Gavin Shan Nov. 27, 2023, 10:42 a.m. UTC | #2
On 11/27/23 21:13, Marcin Juszkiewicz wrote:
> W dniu 27.11.2023 o 00:12, Gavin Shan pisze:
>> @@ -2939,6 +2900,28 @@ static void virt_machine_class_init(ObjectClass *oc, void *data)
>>   {
>>       MachineClass *mc = MACHINE_CLASS(oc);
>>       HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
>> +    static const char * const valid_cpu_types[] = {
>> +#ifdef CONFIG_TCG
>> +        ARM_CPU_TYPE_NAME("cortex-a7"),
>> +        ARM_CPU_TYPE_NAME("cortex-a15"),
>> +        ARM_CPU_TYPE_NAME("cortex-a35"),
>> +        ARM_CPU_TYPE_NAME("cortex-a55"),
>> +        ARM_CPU_TYPE_NAME("cortex-a72"),
>> +        ARM_CPU_TYPE_NAME("cortex-a76"),
>> +        ARM_CPU_TYPE_NAME("cortex-a710"),
>> +        ARM_CPU_TYPE_NAME("a64fx"),
>> +        ARM_CPU_TYPE_NAME("neoverse-n1"),
>> +        ARM_CPU_TYPE_NAME("neoverse-v1"),
>> +        ARM_CPU_TYPE_NAME("neoverse-n2"),
>> +#endif
>> +        ARM_CPU_TYPE_NAME("cortex-a53"),
>> +        ARM_CPU_TYPE_NAME("cortex-a57"),
>> +#if defined(CONFIG_KVM) || defined(CONFIG_HVF)
>> +        ARM_CPU_TYPE_NAME("host"),
>> +#endif
>> +        ARM_CPU_TYPE_NAME("max"),
>> +        NULL
>> +    };
> 
> I understand that you just move list from one place to the other but also wonder why a53/a57 were/are outside of 'ifdef CONFIG_TCG' check.
> 

I'm not sure about HVF, but a53/a57 can be supported by KVM. The supported list of
CPUs by KVM is defined in linux/arch/arm64/include/uapi/asm/kvm.h as below

/*
  * Supported CPU Targets - Adding a new target type is not recommended,
  * unless there are some special registers not supported by the
  * genericv8 syreg table.
  */
#define KVM_ARM_TARGET_AEM_V8           0
#define KVM_ARM_TARGET_FOUNDATION_V8    1
#define KVM_ARM_TARGET_CORTEX_A57       2
#define KVM_ARM_TARGET_XGENE_POTENZA    3
#define KVM_ARM_TARGET_CORTEX_A53       4
/* Generic ARM v8 target */
#define KVM_ARM_TARGET_GENERIC_V8       5

#define KVM_ARM_NUM_TARGETS             6

And the following QEMU commit gives more hints about it.

[gshan@gshan q]$ git show 39920a04952
commit 39920a04952b67fb1fce8fc3519ac18b7a95f3f3
Author: Fabiano Rosas <farosas@suse.de>
Date:   Wed Apr 26 15:00:05 2023 -0300

     target/arm: Move 64-bit TCG CPUs into tcg/
     
     Move the 64-bit CPUs that are TCG-only:
     - cortex-a35
     - cortex-a55
     - cortex-a72
     - cortex-a76
     - a64fx
     - neoverse-n1
     
     Keep the CPUs that can be used with KVM:
     - cortex-a57
     - cortex-a53
     - max
     - host
     
     Signed-off-by: Fabiano Rosas <farosas@suse.de>
     Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
     Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
     Message-id: 20230426180013.14814-6-farosas@suse.de
     Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Thanks,
Gavin
diff mbox series

Patch

diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 668c0d3194..04f9f5fa56 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -204,40 +204,6 @@  static const int a15irqmap[] = {
     [VIRT_PLATFORM_BUS] = 112, /* ...to 112 + PLATFORM_BUS_NUM_IRQS -1 */
 };
 
-static const char *valid_cpus[] = {
-#ifdef CONFIG_TCG
-    ARM_CPU_TYPE_NAME("cortex-a7"),
-    ARM_CPU_TYPE_NAME("cortex-a15"),
-    ARM_CPU_TYPE_NAME("cortex-a35"),
-    ARM_CPU_TYPE_NAME("cortex-a55"),
-    ARM_CPU_TYPE_NAME("cortex-a72"),
-    ARM_CPU_TYPE_NAME("cortex-a76"),
-    ARM_CPU_TYPE_NAME("cortex-a710"),
-    ARM_CPU_TYPE_NAME("a64fx"),
-    ARM_CPU_TYPE_NAME("neoverse-n1"),
-    ARM_CPU_TYPE_NAME("neoverse-v1"),
-    ARM_CPU_TYPE_NAME("neoverse-n2"),
-#endif
-    ARM_CPU_TYPE_NAME("cortex-a53"),
-    ARM_CPU_TYPE_NAME("cortex-a57"),
-#if defined(CONFIG_KVM) || defined(CONFIG_HVF)
-    ARM_CPU_TYPE_NAME("host"),
-#endif
-    ARM_CPU_TYPE_NAME("max"),
-};
-
-static bool cpu_type_valid(const char *cpu)
-{
-    int i;
-
-    for (i = 0; i < ARRAY_SIZE(valid_cpus); i++) {
-        if (strcmp(cpu, valid_cpus[i]) == 0) {
-            return true;
-        }
-    }
-    return false;
-}
-
 static void create_randomness(MachineState *ms, const char *node)
 {
     struct {
@@ -2041,11 +2007,6 @@  static void machvirt_init(MachineState *machine)
     unsigned int smp_cpus = machine->smp.cpus;
     unsigned int max_cpus = machine->smp.max_cpus;
 
-    if (!cpu_type_valid(machine->cpu_type)) {
-        error_report("mach-virt: CPU type %s not supported", machine->cpu_type);
-        exit(1);
-    }
-
     possible_cpus = mc->possible_cpu_arch_ids(machine);
 
     /*
@@ -2939,6 +2900,28 @@  static void virt_machine_class_init(ObjectClass *oc, void *data)
 {
     MachineClass *mc = MACHINE_CLASS(oc);
     HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
+    static const char * const valid_cpu_types[] = {
+#ifdef CONFIG_TCG
+        ARM_CPU_TYPE_NAME("cortex-a7"),
+        ARM_CPU_TYPE_NAME("cortex-a15"),
+        ARM_CPU_TYPE_NAME("cortex-a35"),
+        ARM_CPU_TYPE_NAME("cortex-a55"),
+        ARM_CPU_TYPE_NAME("cortex-a72"),
+        ARM_CPU_TYPE_NAME("cortex-a76"),
+        ARM_CPU_TYPE_NAME("cortex-a710"),
+        ARM_CPU_TYPE_NAME("a64fx"),
+        ARM_CPU_TYPE_NAME("neoverse-n1"),
+        ARM_CPU_TYPE_NAME("neoverse-v1"),
+        ARM_CPU_TYPE_NAME("neoverse-n2"),
+#endif
+        ARM_CPU_TYPE_NAME("cortex-a53"),
+        ARM_CPU_TYPE_NAME("cortex-a57"),
+#if defined(CONFIG_KVM) || defined(CONFIG_HVF)
+        ARM_CPU_TYPE_NAME("host"),
+#endif
+        ARM_CPU_TYPE_NAME("max"),
+        NULL
+    };
 
     mc->init = machvirt_init;
     /* Start with max_cpus set to 512, which is the maximum supported by KVM.
@@ -2965,6 +2948,7 @@  static void virt_machine_class_init(ObjectClass *oc, void *data)
 #else
     mc->default_cpu_type = ARM_CPU_TYPE_NAME("max");
 #endif
+    mc->valid_cpu_types = valid_cpu_types;
     mc->get_default_cpu_node_id = virt_get_default_cpu_node_id;
     mc->kvm_type = virt_kvm_type;
     assert(!mc->get_hotplug_handler);