Message ID | 20231127-module_linking_freeing-v4-2-a2ca1d7027d0@rivosinc.com (mailing list archive) |
---|---|
State | Accepted |
Commit | 4a92a87950c4f86bc372ee3b1da4ba9d092252a9 |
Headers | show |
Series | riscv: Fix issues with module loading | expand |
On Mon, Nov 27, 2023 at 10:08 PM Charlie Jenkins <charlie@rivosinc.com> wrote: > > Use __le16 with le16_to_cpu. > > Fixes: 8fd6c5142395 ("riscv: Add remaining module relocations") > Signed-off-by: Charlie Jenkins <charlie@rivosinc.com> > Reviewed-by: Samuel Holland <samuel.holland@sifive.com> > Tested-by: Samuel Holland <samuel.holland@sifive.com> > --- > arch/riscv/kernel/module.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> #On RZ/Five SMARC EVK Cheers, Prabhakar > diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c > index 53593fe58cd8..aac019ed63b1 100644 > --- a/arch/riscv/kernel/module.c > +++ b/arch/riscv/kernel/module.c > @@ -55,7 +55,7 @@ static bool riscv_insn_valid_32bit_offset(ptrdiff_t val) > > static int riscv_insn_rmw(void *location, u32 keep, u32 set) > { > - u16 *parcel = location; > + __le16 *parcel = location; > u32 insn = (u32)le16_to_cpu(parcel[0]) | (u32)le16_to_cpu(parcel[1]) << 16; > > insn &= keep; > @@ -68,7 +68,7 @@ static int riscv_insn_rmw(void *location, u32 keep, u32 set) > > static int riscv_insn_rvc_rmw(void *location, u16 keep, u16 set) > { > - u16 *parcel = location; > + __le16 *parcel = location; > u16 insn = le16_to_cpu(*parcel); > > insn &= keep; > > -- > 2.42.0 > > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
diff --git a/arch/riscv/kernel/module.c b/arch/riscv/kernel/module.c index 53593fe58cd8..aac019ed63b1 100644 --- a/arch/riscv/kernel/module.c +++ b/arch/riscv/kernel/module.c @@ -55,7 +55,7 @@ static bool riscv_insn_valid_32bit_offset(ptrdiff_t val) static int riscv_insn_rmw(void *location, u32 keep, u32 set) { - u16 *parcel = location; + __le16 *parcel = location; u32 insn = (u32)le16_to_cpu(parcel[0]) | (u32)le16_to_cpu(parcel[1]) << 16; insn &= keep; @@ -68,7 +68,7 @@ static int riscv_insn_rmw(void *location, u32 keep, u32 set) static int riscv_insn_rvc_rmw(void *location, u16 keep, u16 set) { - u16 *parcel = location; + __le16 *parcel = location; u16 insn = le16_to_cpu(*parcel); insn &= keep;