| Message ID | 20231203154030.532880-1-amadeus@jmu.edu.cn (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v2,1/1] arm64: dts: qcom: ipq6018: fix clock rates for GCC_USB0_MOCK_UTMI_CLK | expand |
On 03/12/2023 16:40, Chukun Pan wrote: > The clock provided by XO is 24MHz, not 20MHz. That does not look like XO, but GCC_USB0_MOCK_UTMI_CLK > > Fixes: 5726079cd486 ("arm64: dts: ipq6018: Use reference clock to set dwc3 period") > Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Best regards, Krzysztof
> That does not look like XO, but GCC_USB0_MOCK_UTMI_CLK
I don't have the datasheet, but the reference clock (XO) is 24MHz,
and I receive the following warning:
clk: couldn't set gcc_usb0_mock_utmi_clk clk rate to 20000000 (-22), current rate: 24000000
Thanks,
Chukun
On 05/12/2023 04:02, Chukun Pan wrote: >> That does not look like XO, but GCC_USB0_MOCK_UTMI_CLK > > I don't have the datasheet, but the reference clock (XO) is 24MHz, > and I receive the following warning: > clk: couldn't set gcc_usb0_mock_utmi_clk clk rate to 20000000 (-22), current rate: 24000000 Referencing XO in commit msg is confusing. Anyway, answer to such error is not necessarily change the clock rate. What if it must be 20 MHz? You just ignore such requirement... Best regards, Krzysztof
> Referencing XO in commit msg is confusing. Anyway, answer to such error > is not necessarily change the clock rate. What if it must be 20 MHz? You > just ignore such requirement.. The downstream QSDK kernel [1] and GCC_USB1_MOCK_UTMI_CLK are both 24MHz. Judging from these commit [1][2], I think they forgot to make changes here. 1. https://git.codelinaro.org/clo/qsdk/oss/kernel/linux-ipq-5.4/-/commit/486c8485f59 2. https://github.com/torvalds/linux/commit/d1c10ab1494f09eb12fa6e58fc78bb28d44922ae Thanks, Chukun
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index 2399d16f147e..d114c8096347 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -621,7 +621,7 @@ usb3: usb@8af8800 { <&gcc GCC_USB0_MOCK_UTMI_CLK>; assigned-clock-rates = <133330000>, <133330000>, - <20000000>; + <24000000>; resets = <&gcc GCC_USB0_BCR>; status = "disabled";
The clock provided by XO is 24MHz, not 20MHz. Fixes: 5726079cd486 ("arm64: dts: ipq6018: Use reference clock to set dwc3 period") Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> --- Changes in v2: * No changes, resend due to error link to other threads. arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)