| Message ID | 20231205220526.417719-2-robdclark@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/msm/adreno: Introduce/rework device hw catalog | expand |
On Wed, 6 Dec 2023 at 00:05, Rob Clark <robdclark@gmail.com> wrote: > > From: Rob Clark <robdclark@chromium.org> > > Split into a separate table per generation, in preparation to move each > gen's device table to it's own file. > > Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > --- > drivers/gpu/drm/msm/adreno/adreno_device.c | 59 +++++++++++++++++++--- > 1 file changed, 51 insertions(+), 8 deletions(-)
On 12/5/23 23:03, Rob Clark wrote: > From: Rob Clark <robdclark@chromium.org> > > Split into a separate table per generation, in preparation to move each > gen's device table to it's own file. > > Signed-off-by: Rob Clark <robdclark@chromium.org> > --- > drivers/gpu/drm/msm/adreno/adreno_device.c | 59 +++++++++++++++++++--- > 1 file changed, 51 insertions(+), 8 deletions(-) > > diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c > index 41b13dec9bef..36392801f929 100644 > --- a/drivers/gpu/drm/msm/adreno/adreno_device.c > +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c > @@ -20,7 +20,7 @@ bool allow_vram_carveout = false; > MODULE_PARM_DESC(allow_vram_carveout, "Allow using VRAM Carveout, in place of IOMMU"); > module_param_named(allow_vram_carveout, allow_vram_carveout, bool, 0600); > > -static const struct adreno_info gpulist[] = { > +static const struct adreno_info a2xx_gpus[] = { > { > .chip_ids = ADRENO_CHIP_IDS(0x02000000), > .family = ADRENO_2XX_GEN1, > @@ -55,6 +55,12 @@ static const struct adreno_info gpulist[] = { > .inactive_period = DRM_MSM_INACTIVE_PERIOD, > .init = a2xx_gpu_init, > }, { > + /* sentinal */ sentinel? > + } > +}; > + > +static const struct adreno_info a3xx_gpus[] = { > + { > .chip_ids = ADRENO_CHIP_IDS( > 0x03000512, > 0x03000520 > @@ -110,6 +116,12 @@ static const struct adreno_info gpulist[] = { > .inactive_period = DRM_MSM_INACTIVE_PERIOD, > .init = a3xx_gpu_init, > }, { > + /* sentinal */ > + } > +}; > + > +static const struct adreno_info a4xx_gpus[] = { > + { > .chip_ids = ADRENO_CHIP_IDS(0x04000500), > .family = ADRENO_4XX, > .revn = 405, > @@ -143,6 +155,12 @@ static const struct adreno_info gpulist[] = { > .inactive_period = DRM_MSM_INACTIVE_PERIOD, > .init = a4xx_gpu_init, > }, { > + /* sentinal */ > + } > +}; > + > +static const struct adreno_info a5xx_gpus[] = { > + { > .chip_ids = ADRENO_CHIP_IDS(0x05000600), > .family = ADRENO_5XX, > .revn = 506, > @@ -268,6 +286,12 @@ static const struct adreno_info gpulist[] = { > .init = a5xx_gpu_init, > .zapfw = "a540_zap.mdt", > }, { > + /* sentinal */ > + } > +}; > + > +static const struct adreno_info a6xx_gpus[] = { > + { > .chip_ids = ADRENO_CHIP_IDS(0x06010000), > .family = ADRENO_6XX_GEN1, > .revn = 610, > @@ -493,6 +517,12 @@ static const struct adreno_info gpulist[] = { > .hwcg = a690_hwcg, > .address_space_size = SZ_16G, > }, { > + /* sentinal */ > + } > +}; > + > +static const struct adreno_info a7xx_gpus[] = { > + { > .chip_ids = ADRENO_CHIP_IDS(0x07030001), > .family = ADRENO_7XX_GEN1, > .fw = { > @@ -522,7 +552,18 @@ static const struct adreno_info gpulist[] = { > .zapfw = "a740_zap.mdt", > .hwcg = a740_hwcg, > .address_space_size = SZ_16G, > - }, > + }, { > + /* sentinal */ > + } > +}; > + > +static const struct adreno_info *gpulist[] = { > + a2xx_gpus, > + a3xx_gpus, > + a4xx_gpus, > + a5xx_gpus, > + a6xx_gpus, > + a7xx_gpus, > }; > > MODULE_FIRMWARE("qcom/a300_pm4.fw"); > @@ -557,12 +598,14 @@ static const struct adreno_info *adreno_info(uint32_t chip_id) > { > /* identify gpu: */ > for (int i = 0; i < ARRAY_SIZE(gpulist); i++) { > - const struct adreno_info *info = &gpulist[i]; > - if (info->machine && !of_machine_is_compatible(info->machine)) > - continue; > - for (int j = 0; info->chip_ids[j]; j++) I'm not sure using sentinels here is a good idea, it adds a whole lot of stack size. Perhaps gpulist could be a struct of array pointers and an array of sizes? Konrad
On Wed, 6 Dec 2023 at 14:29, Konrad Dybcio <konrad.dybcio@linaro.org> wrote: > > > > On 12/5/23 23:03, Rob Clark wrote: > > From: Rob Clark <robdclark@chromium.org> > > > > Split into a separate table per generation, in preparation to move each > > gen's device table to it's own file. > > > > Signed-off-by: Rob Clark <robdclark@chromium.org> > > --- > > drivers/gpu/drm/msm/adreno/adreno_device.c | 59 +++++++++++++++++++--- > > 1 file changed, 51 insertions(+), 8 deletions(-) > > > > diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c > > index 41b13dec9bef..36392801f929 100644 > > --- a/drivers/gpu/drm/msm/adreno/adreno_device.c > > +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c > > @@ -20,7 +20,7 @@ bool allow_vram_carveout = false; > > MODULE_PARM_DESC(allow_vram_carveout, "Allow using VRAM Carveout, in place of IOMMU"); > > module_param_named(allow_vram_carveout, allow_vram_carveout, bool, 0600); > > > > -static const struct adreno_info gpulist[] = { > > +static const struct adreno_info a2xx_gpus[] = { > > { > > .chip_ids = ADRENO_CHIP_IDS(0x02000000), > > .family = ADRENO_2XX_GEN1, > > @@ -55,6 +55,12 @@ static const struct adreno_info gpulist[] = { > > .inactive_period = DRM_MSM_INACTIVE_PERIOD, > > .init = a2xx_gpu_init, > > }, { > > + /* sentinal */ > sentinel? > > > + } > > +}; > > + > > +static const struct adreno_info a3xx_gpus[] = { > > + { > > .chip_ids = ADRENO_CHIP_IDS( > > 0x03000512, > > 0x03000520 > > @@ -110,6 +116,12 @@ static const struct adreno_info gpulist[] = { > > .inactive_period = DRM_MSM_INACTIVE_PERIOD, > > .init = a3xx_gpu_init, > > }, { > > + /* sentinal */ > > + } > > +}; > > + > > +static const struct adreno_info a4xx_gpus[] = { > > + { > > .chip_ids = ADRENO_CHIP_IDS(0x04000500), > > .family = ADRENO_4XX, > > .revn = 405, > > @@ -143,6 +155,12 @@ static const struct adreno_info gpulist[] = { > > .inactive_period = DRM_MSM_INACTIVE_PERIOD, > > .init = a4xx_gpu_init, > > }, { > > + /* sentinal */ > > + } > > +}; > > + > > +static const struct adreno_info a5xx_gpus[] = { > > + { > > .chip_ids = ADRENO_CHIP_IDS(0x05000600), > > .family = ADRENO_5XX, > > .revn = 506, > > @@ -268,6 +286,12 @@ static const struct adreno_info gpulist[] = { > > .init = a5xx_gpu_init, > > .zapfw = "a540_zap.mdt", > > }, { > > + /* sentinal */ > > + } > > +}; > > + > > +static const struct adreno_info a6xx_gpus[] = { > > + { > > .chip_ids = ADRENO_CHIP_IDS(0x06010000), > > .family = ADRENO_6XX_GEN1, > > .revn = 610, > > @@ -493,6 +517,12 @@ static const struct adreno_info gpulist[] = { > > .hwcg = a690_hwcg, > > .address_space_size = SZ_16G, > > }, { > > + /* sentinal */ > > + } > > +}; > > + > > +static const struct adreno_info a7xx_gpus[] = { > > + { > > .chip_ids = ADRENO_CHIP_IDS(0x07030001), > > .family = ADRENO_7XX_GEN1, > > .fw = { > > @@ -522,7 +552,18 @@ static const struct adreno_info gpulist[] = { > > .zapfw = "a740_zap.mdt", > > .hwcg = a740_hwcg, > > .address_space_size = SZ_16G, > > - }, > > + }, { > > + /* sentinal */ > > + } > > +}; > > + > > +static const struct adreno_info *gpulist[] = { > > + a2xx_gpus, > > + a3xx_gpus, > > + a4xx_gpus, > > + a5xx_gpus, > > + a6xx_gpus, > > + a7xx_gpus, > > }; > > > > MODULE_FIRMWARE("qcom/a300_pm4.fw"); > > @@ -557,12 +598,14 @@ static const struct adreno_info *adreno_info(uint32_t chip_id) > > { > > /* identify gpu: */ > > for (int i = 0; i < ARRAY_SIZE(gpulist); i++) { > > - const struct adreno_info *info = &gpulist[i]; > > - if (info->machine && !of_machine_is_compatible(info->machine)) > > - continue; > > - for (int j = 0; info->chip_ids[j]; j++) > I'm not sure using sentinels here is a good idea, it adds a > whole lot of stack size. Perhaps gpulist could be a struct > of array pointers and an array of sizes? My 2c would be to reimplement it as a of_device_id.data and thus the device_match_data.
On Wed, Dec 6, 2023 at 4:29 AM Konrad Dybcio <konrad.dybcio@linaro.org> wrote: > > > > On 12/5/23 23:03, Rob Clark wrote: > > From: Rob Clark <robdclark@chromium.org> > > > > Split into a separate table per generation, in preparation to move each > > gen's device table to it's own file. > > > > Signed-off-by: Rob Clark <robdclark@chromium.org> > > --- > > drivers/gpu/drm/msm/adreno/adreno_device.c | 59 +++++++++++++++++++--- > > 1 file changed, 51 insertions(+), 8 deletions(-) > > > > diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c > > index 41b13dec9bef..36392801f929 100644 > > --- a/drivers/gpu/drm/msm/adreno/adreno_device.c > > +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c > > @@ -20,7 +20,7 @@ bool allow_vram_carveout = false; > > MODULE_PARM_DESC(allow_vram_carveout, "Allow using VRAM Carveout, in place of IOMMU"); > > module_param_named(allow_vram_carveout, allow_vram_carveout, bool, 0600); > > > > -static const struct adreno_info gpulist[] = { > > +static const struct adreno_info a2xx_gpus[] = { > > { > > .chip_ids = ADRENO_CHIP_IDS(0x02000000), > > .family = ADRENO_2XX_GEN1, > > @@ -55,6 +55,12 @@ static const struct adreno_info gpulist[] = { > > .inactive_period = DRM_MSM_INACTIVE_PERIOD, > > .init = a2xx_gpu_init, > > }, { > > + /* sentinal */ > sentinel? > > > + } > > +}; > > + > > +static const struct adreno_info a3xx_gpus[] = { > > + { > > .chip_ids = ADRENO_CHIP_IDS( > > 0x03000512, > > 0x03000520 > > @@ -110,6 +116,12 @@ static const struct adreno_info gpulist[] = { > > .inactive_period = DRM_MSM_INACTIVE_PERIOD, > > .init = a3xx_gpu_init, > > }, { > > + /* sentinal */ > > + } > > +}; > > + > > +static const struct adreno_info a4xx_gpus[] = { > > + { > > .chip_ids = ADRENO_CHIP_IDS(0x04000500), > > .family = ADRENO_4XX, > > .revn = 405, > > @@ -143,6 +155,12 @@ static const struct adreno_info gpulist[] = { > > .inactive_period = DRM_MSM_INACTIVE_PERIOD, > > .init = a4xx_gpu_init, > > }, { > > + /* sentinal */ > > + } > > +}; > > + > > +static const struct adreno_info a5xx_gpus[] = { > > + { > > .chip_ids = ADRENO_CHIP_IDS(0x05000600), > > .family = ADRENO_5XX, > > .revn = 506, > > @@ -268,6 +286,12 @@ static const struct adreno_info gpulist[] = { > > .init = a5xx_gpu_init, > > .zapfw = "a540_zap.mdt", > > }, { > > + /* sentinal */ > > + } > > +}; > > + > > +static const struct adreno_info a6xx_gpus[] = { > > + { > > .chip_ids = ADRENO_CHIP_IDS(0x06010000), > > .family = ADRENO_6XX_GEN1, > > .revn = 610, > > @@ -493,6 +517,12 @@ static const struct adreno_info gpulist[] = { > > .hwcg = a690_hwcg, > > .address_space_size = SZ_16G, > > }, { > > + /* sentinal */ > > + } > > +}; > > + > > +static const struct adreno_info a7xx_gpus[] = { > > + { > > .chip_ids = ADRENO_CHIP_IDS(0x07030001), > > .family = ADRENO_7XX_GEN1, > > .fw = { > > @@ -522,7 +552,18 @@ static const struct adreno_info gpulist[] = { > > .zapfw = "a740_zap.mdt", > > .hwcg = a740_hwcg, > > .address_space_size = SZ_16G, > > - }, > > + }, { > > + /* sentinal */ > > + } > > +}; > > + > > +static const struct adreno_info *gpulist[] = { > > + a2xx_gpus, > > + a3xx_gpus, > > + a4xx_gpus, > > + a5xx_gpus, > > + a6xx_gpus, > > + a7xx_gpus, > > }; > > > > MODULE_FIRMWARE("qcom/a300_pm4.fw"); > > @@ -557,12 +598,14 @@ static const struct adreno_info *adreno_info(uint32_t chip_id) > > { > > /* identify gpu: */ > > for (int i = 0; i < ARRAY_SIZE(gpulist); i++) { > > - const struct adreno_info *info = &gpulist[i]; > > - if (info->machine && !of_machine_is_compatible(info->machine)) > > - continue; > > - for (int j = 0; info->chip_ids[j]; j++) > I'm not sure using sentinels here is a good idea, it adds a > whole lot of stack size. Perhaps gpulist could be a struct > of array pointers and an array of sizes? I guess you meant text size.. But with 30 devices currently, that array would be (30 + 7) * 8 = 296 bytes.. each sentinel is ~112 bytes (and arguably we could move a bit more out of adreno_info). So it isn't that big of a difference. Being able to have aNxx_info subclass adreno_effort might be a more compelling reason to go for an array of pointers. I'd have to see how awkward that looks. BR, -R
diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c index 41b13dec9bef..36392801f929 100644 --- a/drivers/gpu/drm/msm/adreno/adreno_device.c +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c @@ -20,7 +20,7 @@ bool allow_vram_carveout = false; MODULE_PARM_DESC(allow_vram_carveout, "Allow using VRAM Carveout, in place of IOMMU"); module_param_named(allow_vram_carveout, allow_vram_carveout, bool, 0600); -static const struct adreno_info gpulist[] = { +static const struct adreno_info a2xx_gpus[] = { { .chip_ids = ADRENO_CHIP_IDS(0x02000000), .family = ADRENO_2XX_GEN1, @@ -55,6 +55,12 @@ static const struct adreno_info gpulist[] = { .inactive_period = DRM_MSM_INACTIVE_PERIOD, .init = a2xx_gpu_init, }, { + /* sentinal */ + } +}; + +static const struct adreno_info a3xx_gpus[] = { + { .chip_ids = ADRENO_CHIP_IDS( 0x03000512, 0x03000520 @@ -110,6 +116,12 @@ static const struct adreno_info gpulist[] = { .inactive_period = DRM_MSM_INACTIVE_PERIOD, .init = a3xx_gpu_init, }, { + /* sentinal */ + } +}; + +static const struct adreno_info a4xx_gpus[] = { + { .chip_ids = ADRENO_CHIP_IDS(0x04000500), .family = ADRENO_4XX, .revn = 405, @@ -143,6 +155,12 @@ static const struct adreno_info gpulist[] = { .inactive_period = DRM_MSM_INACTIVE_PERIOD, .init = a4xx_gpu_init, }, { + /* sentinal */ + } +}; + +static const struct adreno_info a5xx_gpus[] = { + { .chip_ids = ADRENO_CHIP_IDS(0x05000600), .family = ADRENO_5XX, .revn = 506, @@ -268,6 +286,12 @@ static const struct adreno_info gpulist[] = { .init = a5xx_gpu_init, .zapfw = "a540_zap.mdt", }, { + /* sentinal */ + } +}; + +static const struct adreno_info a6xx_gpus[] = { + { .chip_ids = ADRENO_CHIP_IDS(0x06010000), .family = ADRENO_6XX_GEN1, .revn = 610, @@ -493,6 +517,12 @@ static const struct adreno_info gpulist[] = { .hwcg = a690_hwcg, .address_space_size = SZ_16G, }, { + /* sentinal */ + } +}; + +static const struct adreno_info a7xx_gpus[] = { + { .chip_ids = ADRENO_CHIP_IDS(0x07030001), .family = ADRENO_7XX_GEN1, .fw = { @@ -522,7 +552,18 @@ static const struct adreno_info gpulist[] = { .zapfw = "a740_zap.mdt", .hwcg = a740_hwcg, .address_space_size = SZ_16G, - }, + }, { + /* sentinal */ + } +}; + +static const struct adreno_info *gpulist[] = { + a2xx_gpus, + a3xx_gpus, + a4xx_gpus, + a5xx_gpus, + a6xx_gpus, + a7xx_gpus, }; MODULE_FIRMWARE("qcom/a300_pm4.fw"); @@ -557,12 +598,14 @@ static const struct adreno_info *adreno_info(uint32_t chip_id) { /* identify gpu: */ for (int i = 0; i < ARRAY_SIZE(gpulist); i++) { - const struct adreno_info *info = &gpulist[i]; - if (info->machine && !of_machine_is_compatible(info->machine)) - continue; - for (int j = 0; info->chip_ids[j]; j++) - if (info->chip_ids[j] == chip_id) - return info; + for (int j = 0; gpulist[i][j].chip_ids; j++) { + const struct adreno_info *info = &gpulist[i][j]; + if (info->machine && !of_machine_is_compatible(info->machine)) + continue; + for (int k = 0; info->chip_ids[k]; k++) + if (info->chip_ids[k] == chip_id) + return info; + } } return NULL;