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[00/11] Improvements and Lunar Lake support

Message ID 20231204103828.1635531-1-mika.westerberg@linux.intel.com (mailing list archive)
Headers show
Series Improvements and Lunar Lake support | expand

Message

Mika Westerberg Dec. 4, 2023, 10:38 a.m. UTC
Hi all,

This series adds improvements around USB4 v2 support, PCIe tunneling,
some minor fixes and also adds Intel Lunar Lake support.

Gil Fine (7):
  thunderbolt: Handle lane bonding of Gen 4 XDomain links properly
  thunderbolt: Move width_name() helper to tb.h
  thunderbolt: Log XDomain link speed and width
  thunderbolt: Transition link to asymmetric only when both sides support it
  thunderbolt: Improve logging when DisplayPort resource is added due to hotplug
  thunderbolt: Make PCIe tunnel setup and teardown follow CM guide
  thunderbolt: Disable PCIe extended encapsulation upon teardown properly

Mika Westerberg (4):
  thunderbolt: Unwind TMU configuration if tb_switch_set_tmu_mode_params() fails
  thunderbolt: Disable CL states only when actually needed
  thunderbolt: Use tb_dp_read_cap() to read DP_COMMON_CAP as well
  thunderbolt: Add support for Intel Lunar Lake

 drivers/thunderbolt/nhi.c     |  4 +++
 drivers/thunderbolt/nhi.h     |  2 ++
 drivers/thunderbolt/switch.c  | 20 ++-----------
 drivers/thunderbolt/tb.c      | 46 ++++++++++++++++++-----------
 drivers/thunderbolt/tb.h      | 16 +++++++++++
 drivers/thunderbolt/tmu.c     |  2 +-
 drivers/thunderbolt/tunnel.c  | 44 ++++++++++++++++++++--------
 drivers/thunderbolt/xdomain.c | 54 ++++++++++++++++++++++++++++++++++-
 8 files changed, 139 insertions(+), 49 deletions(-)

Comments

Mika Westerberg Dec. 14, 2023, 6:13 a.m. UTC | #1
On Mon, Dec 04, 2023 at 12:38:17PM +0200, Mika Westerberg wrote:
> Hi all,
> 
> This series adds improvements around USB4 v2 support, PCIe tunneling,
> some minor fixes and also adds Intel Lunar Lake support.
> 
> Gil Fine (7):
>   thunderbolt: Handle lane bonding of Gen 4 XDomain links properly
>   thunderbolt: Move width_name() helper to tb.h
>   thunderbolt: Log XDomain link speed and width
>   thunderbolt: Transition link to asymmetric only when both sides support it
>   thunderbolt: Improve logging when DisplayPort resource is added due to hotplug
>   thunderbolt: Make PCIe tunnel setup and teardown follow CM guide
>   thunderbolt: Disable PCIe extended encapsulation upon teardown properly
> 
> Mika Westerberg (4):
>   thunderbolt: Unwind TMU configuration if tb_switch_set_tmu_mode_params() fails
>   thunderbolt: Disable CL states only when actually needed
>   thunderbolt: Use tb_dp_read_cap() to read DP_COMMON_CAP as well
>   thunderbolt: Add support for Intel Lunar Lake

All applied to thunderbolt.git/next.