Message ID | 20231204103828.1635531-1-mika.westerberg@linux.intel.com (mailing list archive) |
---|---|
Headers | show |
Series | Improvements and Lunar Lake support | expand |
On Mon, Dec 04, 2023 at 12:38:17PM +0200, Mika Westerberg wrote: > Hi all, > > This series adds improvements around USB4 v2 support, PCIe tunneling, > some minor fixes and also adds Intel Lunar Lake support. > > Gil Fine (7): > thunderbolt: Handle lane bonding of Gen 4 XDomain links properly > thunderbolt: Move width_name() helper to tb.h > thunderbolt: Log XDomain link speed and width > thunderbolt: Transition link to asymmetric only when both sides support it > thunderbolt: Improve logging when DisplayPort resource is added due to hotplug > thunderbolt: Make PCIe tunnel setup and teardown follow CM guide > thunderbolt: Disable PCIe extended encapsulation upon teardown properly > > Mika Westerberg (4): > thunderbolt: Unwind TMU configuration if tb_switch_set_tmu_mode_params() fails > thunderbolt: Disable CL states only when actually needed > thunderbolt: Use tb_dp_read_cap() to read DP_COMMON_CAP as well > thunderbolt: Add support for Intel Lunar Lake All applied to thunderbolt.git/next.