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[0/3] watchdog: sbsa_gwdt: add support for Marvell ac5

Message ID 20231214150414.1849058-1-enachman@marvell.com (mailing list archive)
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Series watchdog: sbsa_gwdt: add support for Marvell ac5 | expand

Message

Elad Nachman Dec. 14, 2023, 3:04 p.m. UTC
From: Elad Nachman <enachman@marvell.com>

Add support for Marvell ac5/x variant of the ARM
sbsa global watchdog. This watchdog deviates from
the standard driver by the following items:

1. Registers reside in secure register section.
   hence access is only possible via SMC calls to ATF.

2. There are couple more registers which reside in
   other register areas, which needs to be configured
   in order for the watchdog to properly generate
   reset through the SOC.

   The new Marvell compatibility string differentiates between
   the original sbsa mode of operation and the Marvell mode of
   operation.


Elad Nachman (3):
  dt-bindings: watchdog: add Marvell AC5 watchdog
  arm64: dts: ac5: add watchdog nodes
  watchdog: sbsa_gwdt: add support for Marvell ac5

 .../bindings/watchdog/arm,sbsa-gwdt.yaml      |  52 +++-
 arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi |  14 +
 arch/arm64/boot/dts/marvell/ac5-98dx35xx.dtsi |   8 +
 drivers/watchdog/sbsa_gwdt.c                  | 247 ++++++++++++++++--
 4 files changed, 298 insertions(+), 23 deletions(-)

Comments

Chris Packham Dec. 15, 2023, 4:21 a.m. UTC | #1
On 15/12/23 04:04, Elad Nachman wrote:
> From: Elad Nachman <enachman@marvell.com>
>
> Add support for Marvell ac5/x variant of the ARM
> sbsa global watchdog. This watchdog deviates from
> the standard driver by the following items:
>
> 1. Registers reside in secure register section.
>     hence access is only possible via SMC calls to ATF.
>
> 2. There are couple more registers which reside in
>     other register areas, which needs to be configured
>     in order for the watchdog to properly generate
>     reset through the SOC.
>
>     The new Marvell compatibility string differentiates between
>     the original sbsa mode of operation and the Marvell mode of
>     operation.

I gave this a quick try on our AC5X based board and it worked well with 
both action=0/action=1

> Elad Nachman (3):
>    dt-bindings: watchdog: add Marvell AC5 watchdog
>    arm64: dts: ac5: add watchdog nodes
>    watchdog: sbsa_gwdt: add support for Marvell ac5
>
>   .../bindings/watchdog/arm,sbsa-gwdt.yaml      |  52 +++-
>   arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi |  14 +
>   arch/arm64/boot/dts/marvell/ac5-98dx35xx.dtsi |   8 +
>   drivers/watchdog/sbsa_gwdt.c                  | 247 ++++++++++++++++--
>   4 files changed, 298 insertions(+), 23 deletions(-)
>
Rob Herring (Arm) Dec. 15, 2023, 5:48 p.m. UTC | #2
On Thu, Dec 14, 2023 at 05:04:11PM +0200, Elad Nachman wrote:
> From: Elad Nachman <enachman@marvell.com>
> 
> Add support for Marvell ac5/x variant of the ARM
> sbsa global watchdog. This watchdog deviates from
> the standard driver by the following items:
> 
> 1. Registers reside in secure register section.
>    hence access is only possible via SMC calls to ATF.

Oops.

> 2. There are couple more registers which reside in
>    other register areas, which needs to be configured
>    in order for the watchdog to properly generate
>    reset through the SOC.

Your firmware should configure these.

> 
>    The new Marvell compatibility string differentiates between
>    the original sbsa mode of operation and the Marvell mode of
>    operation.
> 
> 
> Elad Nachman (3):
>   dt-bindings: watchdog: add Marvell AC5 watchdog
>   arm64: dts: ac5: add watchdog nodes
>   watchdog: sbsa_gwdt: add support for Marvell ac5
> 
>  .../bindings/watchdog/arm,sbsa-gwdt.yaml      |  52 +++-
>  arch/arm64/boot/dts/marvell/ac5-98dx25xx.dtsi |  14 +
>  arch/arm64/boot/dts/marvell/ac5-98dx35xx.dtsi |   8 +
>  drivers/watchdog/sbsa_gwdt.c                  | 247 ++++++++++++++++--
>  4 files changed, 298 insertions(+), 23 deletions(-)
> 
> -- 
> 2.25.1
>