| Message ID | 20231214105243.3707730-12-tudor.ambarus@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | GS101 Oriole: CMU_PERIC0 support and USI updates | expand |
On Thu, Dec 14, 2023 at 4:53 AM Tudor Ambarus <tudor.ambarus@linaro.org> wrote: > > Enable the eeprom found on the battery connector. > > Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> > --- > .../boot/dts/exynos/google/gs101-oriole.dts | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts > index 4a71f752200d..11b299d21c5d 100644 > --- a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts > +++ b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts > @@ -63,6 +63,19 @@ &ext_200m { > clock-frequency = <200000000>; > }; > > +&hsi2c_8 { > + pinctrl-names = "default"; > + pinctrl-0 = <&hsi2c8_bus>; > + #address-cells = <1>; > + #size-cells = <0>; Not sure if those 4 above properties belong in board's dts or in SoC's dtsi. Krzysztof, what do you think? Other than that: Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> > + status = "okay"; > + > + eeprom: eeprom@50 { > + compatible = "atmel,24c08"; > + reg = <0x50>; > + }; > +}; > + > &pinctrl_far_alive { > key_voldown: key-voldown-pins { > samsung,pins = "gpa7-3"; > @@ -99,6 +112,11 @@ &usi_uart { > status = "okay"; > }; > > +&usi8 { > + samsung,mode = <USI_V2_I2C>; > + status = "okay"; > +}; > + > &watchdog_cl0 { > timeout-sec = <30>; > status = "okay"; > -- > 2.43.0.472.g3155946c3a-goog >
On 14/12/2023 16:55, Sam Protsenko wrote: > On Thu, Dec 14, 2023 at 4:53 AM Tudor Ambarus <tudor.ambarus@linaro.org> wrote: >> >> Enable the eeprom found on the battery connector. >> >> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> >> --- >> .../boot/dts/exynos/google/gs101-oriole.dts | 18 ++++++++++++++++++ >> 1 file changed, 18 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts >> index 4a71f752200d..11b299d21c5d 100644 >> --- a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts >> +++ b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts >> @@ -63,6 +63,19 @@ &ext_200m { >> clock-frequency = <200000000>; >> }; >> >> +&hsi2c_8 { >> + pinctrl-names = "default"; >> + pinctrl-0 = <&hsi2c8_bus>; >> + #address-cells = <1>; >> + #size-cells = <0>; > > Not sure if those 4 above properties belong in board's dts or in SoC's > dtsi. Krzysztof, what do you think? The cells should be in DTSI, because you cannot have an enabled i2c bus without nodes in normal cases. The not-normal case is incomplete description, which does not happen here. The pinctrls I guess as well in DTSI, because you do not customize the pins in the DTS. IOW, if the pinctrl nodes are coming from shared pinctrl.DTSI, then pinctrl-0/names stay in DTSI as well. Best regards, Krzysztof
diff --git a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts index 4a71f752200d..11b299d21c5d 100644 --- a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts +++ b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts @@ -63,6 +63,19 @@ &ext_200m { clock-frequency = <200000000>; }; +&hsi2c_8 { + pinctrl-names = "default"; + pinctrl-0 = <&hsi2c8_bus>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + eeprom: eeprom@50 { + compatible = "atmel,24c08"; + reg = <0x50>; + }; +}; + &pinctrl_far_alive { key_voldown: key-voldown-pins { samsung,pins = "gpa7-3"; @@ -99,6 +112,11 @@ &usi_uart { status = "okay"; }; +&usi8 { + samsung,mode = <USI_V2_I2C>; + status = "okay"; +}; + &watchdog_cl0 { timeout-sec = <30>; status = "okay";
Enable the eeprom found on the battery connector. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> --- .../boot/dts/exynos/google/gs101-oriole.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)