| Message ID | 20231215175648.3397170-2-james.clark@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm: perf: Fix ARCH=arm build with GCC | expand |
On Fri, Dec 15, 2023 at 05:56:48PM +0000, James Clark wrote: > LLVM ignores everything inside the if statement and doesn't generate > errors, but GCC doesn't ignore it, resulting in the following error: > > drivers/perf/arm_pmuv3.c: In function ‘armv8pmu_write_evtype’: > include/linux/bits.h:34:29: error: left shift count >= width of type [-Werror=shift-count-overflow] > 34 | (((~UL(0)) - (UL(1) << (l)) + 1) & \ > > Fix it by using GENMASK_ULL which doesn't overflow on arm32 (even though > the value is never used there). > > Fixes: 3115ee021bfb ("arm64: perf: Include threshold control fields in PMEVTYPER mask") > Reported-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> > Closes: https://lore.kernel.org/linux-arm-kernel/20231215120817.h2f3akgv72zhrtqo@pengutronix.de/ > Signed-off-by: James Clark <james.clark@arm.com> > --- > include/linux/perf/arm_pmuv3.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/include/linux/perf/arm_pmuv3.h b/include/linux/perf/arm_pmuv3.h > index 0f4d62ef3a9a..46377e134d67 100644 > --- a/include/linux/perf/arm_pmuv3.h > +++ b/include/linux/perf/arm_pmuv3.h > @@ -234,8 +234,8 @@ > * PMXEVTYPER: Event selection reg > */ > #define ARMV8_PMU_EVTYPE_EVENT GENMASK(15, 0) /* Mask for EVENT bits */ > -#define ARMV8_PMU_EVTYPE_TH GENMASK(43, 32) > -#define ARMV8_PMU_EVTYPE_TC GENMASK(63, 61) > +#define ARMV8_PMU_EVTYPE_TH GENMASK_ULL(43, 32) /* arm64 only */ > +#define ARMV8_PMU_EVTYPE_TC GENMASK_ULL(63, 61) /* arm64 only */ As expected this fixes compilation on my end, too and it's nicer than v1. Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Thanks Uwe
On Fri, Dec 15, 2023 at 05:56:48PM +0000, James Clark wrote: > LLVM ignores everything inside the if statement and doesn't generate > errors, but GCC doesn't ignore it, resulting in the following error: > > drivers/perf/arm_pmuv3.c: In function 'armv8pmu_write_evtype': > include/linux/bits.h:34:29: error: left shift count >= width of type [-Werror=shift-count-overflow] > 34 | (((~UL(0)) - (UL(1) << (l)) + 1) & \ > > Fix it by using GENMASK_ULL which doesn't overflow on arm32 (even though > the value is never used there). It would be nice if this could explain the overflow problem, i.e. | The GENMASK() macro creates masks of type unsigned long, and we use this to | geenrate the ARMV8_PMU_EVTYPE_TH and ARMV8_PMU_EVTYPE_TC constants. These | include bits above bit 31, and generating these requires shifting more than the | size of unsigned long on 32-bit ARM. | | Consequently when building for 32-bit arm, GCC warns about their use: | | drivers/perf/arm_pmuv3.c: In function 'armv8pmu_write_evtype': | include/linux/bits.h:34:29: error: left shift count >= width of type [-Werror=shift-count-overflow] | 34 | (((~UL(0)) - (UL(1) << (l)) + 1) & \ | | ... though LLVM does not warn as the actual usage is not reachable on 32-bit | ARM due to `if (IS_ENABLED(...)` checks. | | Avoid the warning by using GENMACK_ULL(), which doesn't overflow on 32-bit arm. > Fixes: 3115ee021bfb ("arm64: perf: Include threshold control fields in PMEVTYPER mask") > Reported-by: Uwe Kleine-K"onig <u.kleine-koenig@pengutronix.de> > Closes: https://lore.kernel.org/linux-arm-kernel/20231215120817.h2f3akgv72zhrtqo@pengutronix.de/ > Signed-off-by: James Clark <james.clark@arm.com> Thanks for this! Acked-by: Mark Rutland <mark.rutland@arm.com> Will, Catalin, the broken commit is queued in the arm64 for-next/perf branch (and merged into for-next/core); is this something we can easily fold in? Mark. > --- > include/linux/perf/arm_pmuv3.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/include/linux/perf/arm_pmuv3.h b/include/linux/perf/arm_pmuv3.h > index 0f4d62ef3a9a..46377e134d67 100644 > --- a/include/linux/perf/arm_pmuv3.h > +++ b/include/linux/perf/arm_pmuv3.h > @@ -234,8 +234,8 @@ > * PMXEVTYPER: Event selection reg > */ > #define ARMV8_PMU_EVTYPE_EVENT GENMASK(15, 0) /* Mask for EVENT bits */ > -#define ARMV8_PMU_EVTYPE_TH GENMASK(43, 32) > -#define ARMV8_PMU_EVTYPE_TC GENMASK(63, 61) > +#define ARMV8_PMU_EVTYPE_TH GENMASK_ULL(43, 32) /* arm64 only */ > +#define ARMV8_PMU_EVTYPE_TC GENMASK_ULL(63, 61) /* arm64 only */ > > /* > * Event filters for PMUv3 > -- > 2.34.1 >
diff --git a/include/linux/perf/arm_pmuv3.h b/include/linux/perf/arm_pmuv3.h index 0f4d62ef3a9a..46377e134d67 100644 --- a/include/linux/perf/arm_pmuv3.h +++ b/include/linux/perf/arm_pmuv3.h @@ -234,8 +234,8 @@ * PMXEVTYPER: Event selection reg */ #define ARMV8_PMU_EVTYPE_EVENT GENMASK(15, 0) /* Mask for EVENT bits */ -#define ARMV8_PMU_EVTYPE_TH GENMASK(43, 32) -#define ARMV8_PMU_EVTYPE_TC GENMASK(63, 61) +#define ARMV8_PMU_EVTYPE_TH GENMASK_ULL(43, 32) /* arm64 only */ +#define ARMV8_PMU_EVTYPE_TC GENMASK_ULL(63, 61) /* arm64 only */ /* * Event filters for PMUv3
LLVM ignores everything inside the if statement and doesn't generate errors, but GCC doesn't ignore it, resulting in the following error: drivers/perf/arm_pmuv3.c: In function ‘armv8pmu_write_evtype’: include/linux/bits.h:34:29: error: left shift count >= width of type [-Werror=shift-count-overflow] 34 | (((~UL(0)) - (UL(1) << (l)) + 1) & \ Fix it by using GENMASK_ULL which doesn't overflow on arm32 (even though the value is never used there). Fixes: 3115ee021bfb ("arm64: perf: Include threshold control fields in PMEVTYPER mask") Reported-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Closes: https://lore.kernel.org/linux-arm-kernel/20231215120817.h2f3akgv72zhrtqo@pengutronix.de/ Signed-off-by: James Clark <james.clark@arm.com> --- include/linux/perf/arm_pmuv3.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)