| Message ID | 20231219122957.3358149-2-alexander.stein@ew.tq-group.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/2] ASoC: dt-bindings: fsl-sai: Add power-domains | expand |
On 19/12/2023 13:29, Alexander Stein wrote: > On SoC like i.MX8QXP some SAI IP cores support only Rx path. Allow > specifying only an Rx DMA channel, while omitting the Tx one. > > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> > --- > The feature list in reference manual IMX8DQXPRM Rev. 0 05/2020 > section 1.1.2 "Features" explicitly state that SAI2 and SAI3 is > receive only. > Why aren't you constraining it per variant/device? If only some have one DMA channel, then I would normally expect allOf:if:then narrowing it for each device. Best regards, Krzysztof
Hi Krzysztof, Am Mittwoch, 20. Dezember 2023, 16:48:34 CET schrieb Krzysztof Kozlowski: > On 19/12/2023 13:29, Alexander Stein wrote: > > On SoC like i.MX8QXP some SAI IP cores support only Rx path. Allow > > specifying only an Rx DMA channel, while omitting the Tx one. > > > > Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> > > --- > > The feature list in reference manual IMX8DQXPRM Rev. 0 05/2020 > > section 1.1.2 "Features" explicitly state that SAI2 and SAI3 is > > receive only. > > Why aren't you constraining it per variant/device? If only some have one > DMA channel, then I would normally expect allOf:if:then narrowing it for > each device. I'm not sure I get what you want to constraint. In the very same SoC there are SAI IP instances supporting Rx & Tx while others support Rx only. The feature list in RM IMX8DQXPRM Rev. 0 05/2020 states: > 4x SAI (SAI0 and SAI1 are transmit/receive; SAI2 and SAI3 are receive only) An actual example can be seen at [1]. Best regards, Alexander [1] https://lore.kernel.org/all/20231214150243.1991532-4-alexander.stein@ew.tq-group.com/ > Best regards, > Krzysztof
On 10/01/2024 10:26, Alexander Stein wrote: > Hi Krzysztof, > > Am Mittwoch, 20. Dezember 2023, 16:48:34 CET schrieb Krzysztof Kozlowski: >> On 19/12/2023 13:29, Alexander Stein wrote: >>> On SoC like i.MX8QXP some SAI IP cores support only Rx path. Allow >>> specifying only an Rx DMA channel, while omitting the Tx one. >>> >>> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> >>> --- >>> The feature list in reference manual IMX8DQXPRM Rev. 0 05/2020 >>> section 1.1.2 "Features" explicitly state that SAI2 and SAI3 is >>> receive only. >> >> Why aren't you constraining it per variant/device? If only some have one >> DMA channel, then I would normally expect allOf:if:then narrowing it for >> each device. > > I'm not sure I get what you want to constraint. In the very same SoC there are > SAI IP instances supporting Rx & Tx while others support Rx only. > The feature list in RM IMX8DQXPRM Rev. 0 05/2020 states: >> 4x SAI (SAI0 and SAI1 are transmit/receive; SAI2 and SAI3 are receive only) > > An actual example can be seen at [1]. > Ah, that's fine. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/sound/fsl,sai.yaml b/Documentation/devicetree/bindings/sound/fsl,sai.yaml index e90286f9b5fd..1580b1759fad 100644 --- a/Documentation/devicetree/bindings/sound/fsl,sai.yaml +++ b/Documentation/devicetree/bindings/sound/fsl,sai.yaml @@ -79,11 +79,13 @@ properties: maxItems: 1 dmas: + minItems: 1 items: - description: DMA controller phandle and request line for RX - description: DMA controller phandle and request line for TX dma-names: + minItems: 1 items: - const: rx - const: tx
On SoC like i.MX8QXP some SAI IP cores support only Rx path. Allow specifying only an Rx DMA channel, while omitting the Tx one. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> --- The feature list in reference manual IMX8DQXPRM Rev. 0 05/2020 section 1.1.2 "Features" explicitly state that SAI2 and SAI3 is receive only. Documentation/devicetree/bindings/sound/fsl,sai.yaml | 2 ++ 1 file changed, 2 insertions(+)