| Message ID | 20240102205941.29654-2-zajec5@gmail.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | [1/2] dt-bindings: arm64: mediatek: Add MT7988A and BPI-R4 | expand |
Il 02/01/24 21:59, Rafał Miłecki ha scritto: > From: Rafał Miłecki <rafal@milecki.pl> > > MT7988A (AKA MediaTek Filogic 880) is a quad-core ARM Cortex-A73 > platform designed for Wi-Fi 7 devices (there is no wireless on SoC > though). The first public MT7988A device is Banana Pi BPI-R4. > > Many SoC parts remain to be added (they need their own bindings or > depend on missing clocks). Those present block however are correct and > having base .dtsi will help testing & working on missing stuff. > > Signed-off-by: Rafał Miłecki <rafal@milecki.pl> > --- > arch/arm64/boot/dts/mediatek/Makefile | 1 + > .../dts/mediatek/mt7988a-bananapi-bpi-r4.dts | 11 ++ > arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 149 ++++++++++++++++++ > 3 files changed, 161 insertions(+) > create mode 100644 arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts > create mode 100644 arch/arm64/boot/dts/mediatek/mt7988a.dtsi > > diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile > index 1e6f91731e92..0a189d5d8006 100644 > --- a/arch/arm64/boot/dts/mediatek/Makefile > +++ b/arch/arm64/boot/dts/mediatek/Makefile > @@ -15,6 +15,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-nor.dtbo > dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-sd.dtbo > dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-rfb.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986b-rfb.dtb > +dtb-$(CONFIG_ARCH_MEDIATEK) += mt7988a-bananapi-bpi-r4.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt8167-pumpkin.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm.dtb > dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana.dtb > diff --git a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts > new file mode 100644 > index 000000000000..efc4ad0b08b8 > --- /dev/null > +++ b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts > @@ -0,0 +1,11 @@ > +// SPDX-License-Identifier: GPL-2.0-only OR MIT > + > +/dts-v1/; > + > +#include "mt7988a.dtsi" > + > +/ { > + compatible = "bananapi,bpi-r4", "mediatek,mt7988a"; > + model = "Banana Pi BPI-R4"; > + chassis-type = "embedded"; > +}; > diff --git a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi > new file mode 100644 > index 000000000000..0f2ae9c7aef7 > --- /dev/null > +++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi > @@ -0,0 +1,149 @@ > +// SPDX-License-Identifier: GPL-2.0-only OR MIT > + > +#include <dt-bindings/interrupt-controller/arm-gic.h> > + > +/ { > + compatible = "mediatek,mt7986a"; Why is the compatible describing MT798*6*A instead of MT7988A? Please fix. > + interrupt-parent = <&gic>; > + #address-cells = <2>; > + #size-cells = <2>; > + > + cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + > + cpu@0 { > + compatible = "arm,cortex-a73"; > + reg = <0x0>; > + device_type = "cpu"; > + enable-method = "psci"; > + }; > + > + cpu@1 { > + compatible = "arm,cortex-a73"; > + reg = <0x1>; > + device_type = "cpu"; > + enable-method = "psci"; > + }; > + > + cpu@2 { > + compatible = "arm,cortex-a73"; > + reg = <0x2>; > + device_type = "cpu"; > + enable-method = "psci"; > + }; > + > + cpu@3 { > + compatible = "arm,cortex-a73"; > + reg = <0x3>; > + device_type = "cpu"; > + enable-method = "psci"; > + }; > + }; > + > + oscillator-40m { > + compatible = "fixed-clock"; > + clock-frequency = <40000000>; > + #clock-cells = <0>; > + clock-output-names = "clkxtal"; > + }; > + > + pmu { > + compatible = "arm,cortex-a73-pmu"; > + interrupt-parent = <&gic>; > + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; > + }; > + > + psci { > + compatible = "arm,psci-0.2"; > + method = "smc"; > + }; > + > + reserved-memory { > + ranges; > + #address-cells = <2>; > + #size-cells = <2>; > + > + /* 320 KiB reserved for ARM Trusted Firmware (BL31 and BL32) */ > + secmon@43000000 { This is board specific (actually, it is bootloader specific!), so please move it to your board dts(i). > + reg = <0 0x43000000 0 0x50000>; > + no-map; > + }; > + > + }; > + > + soc { > + compatible = "simple-bus"; > + ranges; > + #address-cells = <2>; > + #size-cells = <2>; > + > + gic: interrupt-controller@c000000 { > + compatible = "arm,gic-v3"; > + reg = <0 0x0c000000 0 0x40000>, /* GICD */ > + <0 0x0c080000 0 0x200000>, /* GICR */ > + <0 0x0c400000 0 0x2000>, /* GICC */ > + <0 0x0c410000 0 0x1000>, /* GICH */ > + <0 0x0c420000 0 0x2000>; /* GICV */ > + interrupt-parent = <&gic>; > + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-controller; > + #interrupt-cells = <3>; > + }; > + > + watchdog@1001c000 { > + compatible = "mediatek,mt7988-wdt"; > + reg = <0 0x1001c000 0 0x1000>; > + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; > + #reset-cells = <1>; > + }; > + }; > + > + thermal-zones { > + cpu-thermal { > + polling-delay-passive = <1000>; > + polling-delay = <1000>; > + Those thermal zones will not work, as they have no thermal-sensors - as this node is right now, it will produce a probe error and nothing else: please either drop it entirely or add support for the thermal sensors (lvts or auxadc?) and fix this node to use them. > + trips { > + crit { > + temperature = <125000>; > + hysteresis = <2000>; > + type = "critical"; > + }; > + > + hot { > + temperature = <120000>; > + hysteresis = <2000>; > + type = "hot"; > + }; > + > + active-high { > + temperature = <115000>; > + hysteresis = <2000>; > + type = "active"; Active cooling is board specific. Keep only critical/hot trips in the SoC DT. > + }; > + > + active-med { > + temperature = <85000>; > + hysteresis = <2000>; > + type = "active"; > + }; > + > + active-low { > + temperature = <40000>; > + hysteresis = <2000>; > + type = "active"; > + }; > + }; > + }; > + }; > + > + timer { > + compatible = "arm,armv8-timer"; > + interrupt-parent = <&gic>; > + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, > + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, > + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, > + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; > + }; > +}; Regards, Angelo
Hi thanks Rafal for making the first loop of Dts-patches and splitting it and Angelo for first review. Just my 2c on the thermal-part. > Gesendet: Mittwoch, 03. Januar 2024 um 10:49 Uhr > Von: "AngeloGioacchino Del Regno" <angelogioacchino.delregno@collabora.com> > > Il 02/01/24 21:59, Rafał Miłecki ha scritto: > > From: Rafał Miłecki <rafal@milecki.pl> > > > > MT7988A (AKA MediaTek Filogic 880) is a quad-core ARM Cortex-A73 > > platform designed for Wi-Fi 7 devices (there is no wireless on SoC > > though). The first public MT7988A device is Banana Pi BPI-R4. > > > > Many SoC parts remain to be added (they need their own bindings or > > depend on missing clocks). Those present block however are correct and > > having base .dtsi will help testing & working on missing stuff. > > > > + thermal-zones { > > + cpu-thermal { > > + polling-delay-passive = <1000>; > > + polling-delay = <1000>; > > + > > Those thermal zones will not work, as they have no thermal-sensors - as this > node is right now, it will produce a probe error and nothing else: please > either drop it entirely or add support for the thermal sensors (lvts or auxadc?) > and fix this node to use them. it is LVTS and i upstreamed dt-binding and driverchange already, but it also needs a (infracfg-)reset which i try to upstream soon after infracfg clock driver appear in next (imho daniels patch merged in subsystem tree today). so also the infracfg-node will be needed in next round, if thermal part should be part of it (else not much is in the dtsi at this time). > > + trips { > > + crit { > > + temperature = <125000>; > > + hysteresis = <2000>; > > + type = "critical"; > > + }; > > + > > + hot { > > + temperature = <120000>; > > + hysteresis = <2000>; > > + type = "hot"; > > + }; > > + > > + active-high { > > + temperature = <115000>; > > + hysteresis = <2000>; > > + type = "active"; > > Active cooling is board specific. Keep only critical/hot trips in the SoC DT. > > > + }; > > + > > + active-med { > > + temperature = <85000>; > > + hysteresis = <2000>; > > + type = "active"; > > + }; > > + > > + active-low { > > + temperature = <40000>; > > + hysteresis = <2000>; > > + type = "active"; > > + }; > > + }; > > + }; > > + }; > > + > > + timer { > > + compatible = "arm,armv8-timer"; > > + interrupt-parent = <&gic>; > > + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, > > + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, > > + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, > > + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; > > + }; > > +}; > > Regards, > Angelo @rafal how do we sync our work? what is your codebase? i currently work on daniels wip tree, but it does not contain your current splitting... maybe daniel can include your splitted dts patches? i already tried to fix some binding-issues in the full dts(i).... waiting for vendor about clocks for mmc which are currently not matching actual binding (and using mt7986 compatible). regards Frank
diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile index 1e6f91731e92..0a189d5d8006 100644 --- a/arch/arm64/boot/dts/mediatek/Makefile +++ b/arch/arm64/boot/dts/mediatek/Makefile @@ -15,6 +15,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-nor.dtbo dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-sd.dtbo dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-rfb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986b-rfb.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) += mt7988a-bananapi-bpi-r4.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8167-pumpkin.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm.dtb dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana.dtb diff --git a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts new file mode 100644 index 000000000000..efc4ad0b08b8 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT + +/dts-v1/; + +#include "mt7988a.dtsi" + +/ { + compatible = "bananapi,bpi-r4", "mediatek,mt7988a"; + model = "Banana Pi BPI-R4"; + chassis-type = "embedded"; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi new file mode 100644 index 000000000000..0f2ae9c7aef7 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi @@ -0,0 +1,149 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT + +#include <dt-bindings/interrupt-controller/arm-gic.h> + +/ { + compatible = "mediatek,mt7986a"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "arm,cortex-a73"; + reg = <0x0>; + device_type = "cpu"; + enable-method = "psci"; + }; + + cpu@1 { + compatible = "arm,cortex-a73"; + reg = <0x1>; + device_type = "cpu"; + enable-method = "psci"; + }; + + cpu@2 { + compatible = "arm,cortex-a73"; + reg = <0x2>; + device_type = "cpu"; + enable-method = "psci"; + }; + + cpu@3 { + compatible = "arm,cortex-a73"; + reg = <0x3>; + device_type = "cpu"; + enable-method = "psci"; + }; + }; + + oscillator-40m { + compatible = "fixed-clock"; + clock-frequency = <40000000>; + #clock-cells = <0>; + clock-output-names = "clkxtal"; + }; + + pmu { + compatible = "arm,cortex-a73-pmu"; + interrupt-parent = <&gic>; + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + + reserved-memory { + ranges; + #address-cells = <2>; + #size-cells = <2>; + + /* 320 KiB reserved for ARM Trusted Firmware (BL31 and BL32) */ + secmon@43000000 { + reg = <0 0x43000000 0 0x50000>; + no-map; + }; + + }; + + soc { + compatible = "simple-bus"; + ranges; + #address-cells = <2>; + #size-cells = <2>; + + gic: interrupt-controller@c000000 { + compatible = "arm,gic-v3"; + reg = <0 0x0c000000 0 0x40000>, /* GICD */ + <0 0x0c080000 0 0x200000>, /* GICR */ + <0 0x0c400000 0 0x2000>, /* GICC */ + <0 0x0c410000 0 0x1000>, /* GICH */ + <0 0x0c420000 0 0x2000>; /* GICV */ + interrupt-parent = <&gic>; + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; + interrupt-controller; + #interrupt-cells = <3>; + }; + + watchdog@1001c000 { + compatible = "mediatek,mt7988-wdt"; + reg = <0 0x1001c000 0 0x1000>; + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; + #reset-cells = <1>; + }; + }; + + thermal-zones { + cpu-thermal { + polling-delay-passive = <1000>; + polling-delay = <1000>; + + trips { + crit { + temperature = <125000>; + hysteresis = <2000>; + type = "critical"; + }; + + hot { + temperature = <120000>; + hysteresis = <2000>; + type = "hot"; + }; + + active-high { + temperature = <115000>; + hysteresis = <2000>; + type = "active"; + }; + + active-med { + temperature = <85000>; + hysteresis = <2000>; + type = "active"; + }; + + active-low { + temperature = <40000>; + hysteresis = <2000>; + type = "active"; + }; + }; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupt-parent = <&gic>; + interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, + <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; + }; +};