| Message ID | 20240103174013.147279-10-dbarboza@ventanamicro.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | target/riscv: deprecate riscv_cpu_options[] | expand |
On Thu, Jan 4, 2024 at 3:49 AM Daniel Henrique Barboza <dbarboza@ventanamicro.com> wrote: > > Do the same thing we did with 'vlen' in the previous patch with 'elen'. > > Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > target/riscv/cpu.c | 44 ++++++++++++++++++++++++++++++++++++-- > target/riscv/tcg/tcg-cpu.c | 5 ----- > 2 files changed, 42 insertions(+), 7 deletions(-) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index 557874a017..da432e4c1e 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -1269,6 +1269,7 @@ static void riscv_cpu_init(Object *obj) > /* Default values for non-bool cpu properties */ > cpu->cfg.pmu_mask = MAKE_64BIT_MASK(3, 16); > cpu->cfg.vlen = 128; > + cpu->cfg.elen = 64; > cpu->env.vext_ver = VEXT_VERSION_1_00_0; > } > > @@ -1775,9 +1776,47 @@ static const PropertyInfo prop_vlen = { > .set = prop_vlen_set, > }; > > -Property riscv_cpu_options[] = { > - DEFINE_PROP_UINT16("elen", RISCVCPU, cfg.elen, 64), > +static void prop_elen_set(Object *obj, Visitor *v, const char *name, > + void *opaque, Error **errp) > +{ > + RISCVCPU *cpu = RISCV_CPU(obj); > + uint16_t value; > + > + if (!visit_type_uint16(v, name, &value, errp)) { > + return; > + } > + > + if (!is_power_of_2(value)) { > + error_setg(errp, "Vector extension ELEN must be power of 2"); > + return; > + } > + > + if (value != cpu->cfg.elen && riscv_cpu_is_vendor(obj)) { > + cpu_set_prop_err(cpu, name, errp); > + error_append_hint(errp, "Current '%s' val: %u\n", > + name, cpu->cfg.elen); > + return; > + } > + > + cpu_option_add_user_setting(name, value); > + cpu->cfg.elen = value; > +} > > +static void prop_elen_get(Object *obj, Visitor *v, const char *name, > + void *opaque, Error **errp) > +{ > + uint16_t value = RISCV_CPU(obj)->cfg.elen; > + > + visit_type_uint16(v, name, &value, errp); > +} > + > +static const PropertyInfo prop_elen = { > + .name = "elen", > + .get = prop_elen_get, > + .set = prop_elen_set, > +}; > + > +Property riscv_cpu_options[] = { > DEFINE_PROP_UINT16("cbom_blocksize", RISCVCPU, cfg.cbom_blocksize, 64), > DEFINE_PROP_UINT16("cboz_blocksize", RISCVCPU, cfg.cboz_blocksize, 64), > > @@ -1797,6 +1836,7 @@ static Property riscv_cpu_properties[] = { > {.name = "vext_spec", .info = &prop_vext_spec}, > > {.name = "vlen", .info = &prop_vlen}, > + {.name = "elen", .info = &prop_elen}, > > #ifndef CONFIG_USER_ONLY > DEFINE_PROP_UINT64("resetvec", RISCVCPU, env.resetvec, DEFAULT_RSTVEC), > diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c > index 8ec858e096..84064ef7e0 100644 > --- a/target/riscv/tcg/tcg-cpu.c > +++ b/target/riscv/tcg/tcg-cpu.c > @@ -185,11 +185,6 @@ static void riscv_cpu_validate_v(CPURISCVState *env, RISCVCPUConfig *cfg, > return; > } > > - if (!is_power_of_2(cfg->elen)) { > - error_setg(errp, "Vector extension ELEN must be power of 2"); > - return; > - } > - > if (cfg->elen > 64 || cfg->elen < 8) { > error_setg(errp, > "Vector extension implementation only supports ELEN " > -- > 2.43.0 > >
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 557874a017..da432e4c1e 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1269,6 +1269,7 @@ static void riscv_cpu_init(Object *obj) /* Default values for non-bool cpu properties */ cpu->cfg.pmu_mask = MAKE_64BIT_MASK(3, 16); cpu->cfg.vlen = 128; + cpu->cfg.elen = 64; cpu->env.vext_ver = VEXT_VERSION_1_00_0; } @@ -1775,9 +1776,47 @@ static const PropertyInfo prop_vlen = { .set = prop_vlen_set, }; -Property riscv_cpu_options[] = { - DEFINE_PROP_UINT16("elen", RISCVCPU, cfg.elen, 64), +static void prop_elen_set(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + RISCVCPU *cpu = RISCV_CPU(obj); + uint16_t value; + + if (!visit_type_uint16(v, name, &value, errp)) { + return; + } + + if (!is_power_of_2(value)) { + error_setg(errp, "Vector extension ELEN must be power of 2"); + return; + } + + if (value != cpu->cfg.elen && riscv_cpu_is_vendor(obj)) { + cpu_set_prop_err(cpu, name, errp); + error_append_hint(errp, "Current '%s' val: %u\n", + name, cpu->cfg.elen); + return; + } + + cpu_option_add_user_setting(name, value); + cpu->cfg.elen = value; +} +static void prop_elen_get(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + uint16_t value = RISCV_CPU(obj)->cfg.elen; + + visit_type_uint16(v, name, &value, errp); +} + +static const PropertyInfo prop_elen = { + .name = "elen", + .get = prop_elen_get, + .set = prop_elen_set, +}; + +Property riscv_cpu_options[] = { DEFINE_PROP_UINT16("cbom_blocksize", RISCVCPU, cfg.cbom_blocksize, 64), DEFINE_PROP_UINT16("cboz_blocksize", RISCVCPU, cfg.cboz_blocksize, 64), @@ -1797,6 +1836,7 @@ static Property riscv_cpu_properties[] = { {.name = "vext_spec", .info = &prop_vext_spec}, {.name = "vlen", .info = &prop_vlen}, + {.name = "elen", .info = &prop_elen}, #ifndef CONFIG_USER_ONLY DEFINE_PROP_UINT64("resetvec", RISCVCPU, env.resetvec, DEFAULT_RSTVEC), diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index 8ec858e096..84064ef7e0 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -185,11 +185,6 @@ static void riscv_cpu_validate_v(CPURISCVState *env, RISCVCPUConfig *cfg, return; } - if (!is_power_of_2(cfg->elen)) { - error_setg(errp, "Vector extension ELEN must be power of 2"); - return; - } - if (cfg->elen > 64 || cfg->elen < 8) { error_setg(errp, "Vector extension implementation only supports ELEN "
Do the same thing we did with 'vlen' in the previous patch with 'elen'. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> --- target/riscv/cpu.c | 44 ++++++++++++++++++++++++++++++++++++-- target/riscv/tcg/tcg-cpu.c | 5 ----- 2 files changed, 42 insertions(+), 7 deletions(-)