Message ID | 20240106181503.1746200-1-sam@rfc1149.net (mailing list archive) |
---|---|
Headers | show |
Series | Add "num-prio-bits" property for Cortex-M devices | expand |
On Sat, 6 Jan 2024 at 18:15, Samuel Tardieu <sam@rfc1149.net> wrote: > > This patch series builds on a discussion initiated by Anton Kochkov on > this list in 2022. It allows setting the appropriate number of priority > bits for Cortex-M devices. For example, FreeRTOS checks at startup that > the right number of priority bits is available in order to guarantee > its runtime structures safety. They have added a configuration option > to disable this check when running on QEMU because QEMU always use 2 > bits for Cortex-M0/M0+/M1 and 8 bits for other devices. > > While this change allows the number of priority bits to be properly > configured, it keeps the same default as before in order to preserve > backward compatibility unless the SoC configures the exact value. Applied to target-arm.next, thanks. -- PMM