| Message ID | 20240105230546.265053-13-dbarboza@ventanamicro.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | target/riscv: deprecate riscv_cpu_options[] | expand |
On Sat, Jan 6, 2024 at 9:09 AM Daniel Henrique Barboza <dbarboza@ventanamicro.com> wrote: > > Do the same we did with 'cbom_blocksize' in the previous patch. > > Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > target/riscv/cpu.c | 38 +++++++++++++++++++++++++++++++++++++- > 1 file changed, 37 insertions(+), 1 deletion(-) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index b77d26231c..e3cbe9b1b6 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -1317,6 +1317,7 @@ static void riscv_cpu_init(Object *obj) > cpu->cfg.vlen = 128; > cpu->cfg.elen = 64; > cpu->cfg.cbom_blocksize = 64; > + cpu->cfg.cbop_blocksize = 64; > cpu->env.vext_ver = VEXT_VERSION_1_00_0; > } > > @@ -1902,8 +1903,42 @@ static const PropertyInfo prop_cbom_blksize = { > .set = prop_cbom_blksize_set, > }; > > +static void prop_cbop_blksize_set(Object *obj, Visitor *v, const char *name, > + void *opaque, Error **errp) > +{ > + RISCVCPU *cpu = RISCV_CPU(obj); > + uint16_t value; > + > + if (!visit_type_uint16(v, name, &value, errp)) { > + return; > + } > + > + if (value != cpu->cfg.cbop_blocksize && riscv_cpu_is_vendor(obj)) { > + cpu_set_prop_err(cpu, name, errp); > + error_append_hint(errp, "Current '%s' val: %u\n", > + name, cpu->cfg.cbop_blocksize); > + return; > + } > + > + cpu_option_add_user_setting(name, value); > + cpu->cfg.cbop_blocksize = value; > +} > + > +static void prop_cbop_blksize_get(Object *obj, Visitor *v, const char *name, > + void *opaque, Error **errp) > +{ > + uint16_t value = RISCV_CPU(obj)->cfg.cbop_blocksize; > + > + visit_type_uint16(v, name, &value, errp); > +} > + > +static const PropertyInfo prop_cbop_blksize = { > + .name = "cbop_blocksize", > + .get = prop_cbop_blksize_get, > + .set = prop_cbop_blksize_set, > +}; > + > Property riscv_cpu_options[] = { > - DEFINE_PROP_UINT16("cbop_blocksize", RISCVCPU, cfg.cbop_blocksize, 64), > DEFINE_PROP_UINT16("cboz_blocksize", RISCVCPU, cfg.cboz_blocksize, 64), > > DEFINE_PROP_END_OF_LIST(), > @@ -1992,6 +2027,7 @@ static Property riscv_cpu_properties[] = { > {.name = "elen", .info = &prop_elen}, > > {.name = "cbom_blocksize", .info = &prop_cbom_blksize}, > + {.name = "cbop_blocksize", .info = &prop_cbop_blksize}, > > #ifndef CONFIG_USER_ONLY > DEFINE_PROP_UINT64("resetvec", RISCVCPU, env.resetvec, DEFAULT_RSTVEC), > -- > 2.43.0 > >
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index b77d26231c..e3cbe9b1b6 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1317,6 +1317,7 @@ static void riscv_cpu_init(Object *obj) cpu->cfg.vlen = 128; cpu->cfg.elen = 64; cpu->cfg.cbom_blocksize = 64; + cpu->cfg.cbop_blocksize = 64; cpu->env.vext_ver = VEXT_VERSION_1_00_0; } @@ -1902,8 +1903,42 @@ static const PropertyInfo prop_cbom_blksize = { .set = prop_cbom_blksize_set, }; +static void prop_cbop_blksize_set(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + RISCVCPU *cpu = RISCV_CPU(obj); + uint16_t value; + + if (!visit_type_uint16(v, name, &value, errp)) { + return; + } + + if (value != cpu->cfg.cbop_blocksize && riscv_cpu_is_vendor(obj)) { + cpu_set_prop_err(cpu, name, errp); + error_append_hint(errp, "Current '%s' val: %u\n", + name, cpu->cfg.cbop_blocksize); + return; + } + + cpu_option_add_user_setting(name, value); + cpu->cfg.cbop_blocksize = value; +} + +static void prop_cbop_blksize_get(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + uint16_t value = RISCV_CPU(obj)->cfg.cbop_blocksize; + + visit_type_uint16(v, name, &value, errp); +} + +static const PropertyInfo prop_cbop_blksize = { + .name = "cbop_blocksize", + .get = prop_cbop_blksize_get, + .set = prop_cbop_blksize_set, +}; + Property riscv_cpu_options[] = { - DEFINE_PROP_UINT16("cbop_blocksize", RISCVCPU, cfg.cbop_blocksize, 64), DEFINE_PROP_UINT16("cboz_blocksize", RISCVCPU, cfg.cboz_blocksize, 64), DEFINE_PROP_END_OF_LIST(), @@ -1992,6 +2027,7 @@ static Property riscv_cpu_properties[] = { {.name = "elen", .info = &prop_elen}, {.name = "cbom_blocksize", .info = &prop_cbom_blksize}, + {.name = "cbop_blocksize", .info = &prop_cbop_blksize}, #ifndef CONFIG_USER_ONLY DEFINE_PROP_UINT64("resetvec", RISCVCPU, env.resetvec, DEFAULT_RSTVEC),
Do the same we did with 'cbom_blocksize' in the previous patch. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> --- target/riscv/cpu.c | 38 +++++++++++++++++++++++++++++++++++++- 1 file changed, 37 insertions(+), 1 deletion(-)