| Message ID | 20240105230546.265053-16-dbarboza@ventanamicro.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | target/riscv: deprecate riscv_cpu_options[] | expand |
On Sat, Jan 6, 2024 at 9:09 AM Daniel Henrique Barboza <dbarboza@ventanamicro.com> wrote: > > Keep all class properties in riscv_cpu_properties[]. > > Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > target/riscv/cpu.c | 69 +++++++++++++++++++++++++--------------------- > 1 file changed, 37 insertions(+), 32 deletions(-) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index 9d4243891c..c725a4839d 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -1974,6 +1974,41 @@ static const PropertyInfo prop_cboz_blksize = { > .set = prop_cboz_blksize_set, > }; > > +static void prop_mvendorid_set(Object *obj, Visitor *v, const char *name, > + void *opaque, Error **errp) > +{ > + bool dynamic_cpu = riscv_cpu_is_dynamic(obj); > + RISCVCPU *cpu = RISCV_CPU(obj); > + uint32_t prev_val = cpu->cfg.mvendorid; > + uint32_t value; > + > + if (!visit_type_uint32(v, name, &value, errp)) { > + return; > + } > + > + if (!dynamic_cpu && prev_val != value) { > + error_setg(errp, "Unable to change %s mvendorid (0x%x)", > + object_get_typename(obj), prev_val); > + return; > + } > + > + cpu->cfg.mvendorid = value; > +} > + > +static void prop_mvendorid_get(Object *obj, Visitor *v, const char *name, > + void *opaque, Error **errp) > +{ > + uint32_t value = RISCV_CPU(obj)->cfg.mvendorid; > + > + visit_type_uint32(v, name, &value, errp); > +} > + > +static const PropertyInfo prop_mvendorid = { > + .name = "mvendorid", > + .get = prop_mvendorid_get, > + .set = prop_mvendorid_set, > +}; > + > /* > * RVA22U64 defines some 'named features' or 'synthetic extensions' > * that are cache related: Za64rs, Zic64b, Ziccif, Ziccrse, Ziccamoa > @@ -2060,6 +2095,8 @@ static Property riscv_cpu_properties[] = { > {.name = "cbop_blocksize", .info = &prop_cbop_blksize}, > {.name = "cboz_blocksize", .info = &prop_cboz_blksize}, > > + {.name = "mvendorid", .info = &prop_mvendorid}, > + > #ifndef CONFIG_USER_ONLY > DEFINE_PROP_UINT64("resetvec", RISCVCPU, env.resetvec, DEFAULT_RSTVEC), > #endif > @@ -2140,35 +2177,6 @@ static const struct SysemuCPUOps riscv_sysemu_ops = { > }; > #endif > > -static void cpu_set_mvendorid(Object *obj, Visitor *v, const char *name, > - void *opaque, Error **errp) > -{ > - bool dynamic_cpu = riscv_cpu_is_dynamic(obj); > - RISCVCPU *cpu = RISCV_CPU(obj); > - uint32_t prev_val = cpu->cfg.mvendorid; > - uint32_t value; > - > - if (!visit_type_uint32(v, name, &value, errp)) { > - return; > - } > - > - if (!dynamic_cpu && prev_val != value) { > - error_setg(errp, "Unable to change %s mvendorid (0x%x)", > - object_get_typename(obj), prev_val); > - return; > - } > - > - cpu->cfg.mvendorid = value; > -} > - > -static void cpu_get_mvendorid(Object *obj, Visitor *v, const char *name, > - void *opaque, Error **errp) > -{ > - uint32_t value = RISCV_CPU(obj)->cfg.mvendorid; > - > - visit_type_uint32(v, name, &value, errp); > -} > - > static void cpu_set_mimpid(Object *obj, Visitor *v, const char *name, > void *opaque, Error **errp) > { > @@ -2278,9 +2286,6 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data) > cc->gdb_arch_name = riscv_gdb_arch_name; > cc->gdb_get_dynamic_xml = riscv_gdb_get_dynamic_xml; > > - object_class_property_add(c, "mvendorid", "uint32", cpu_get_mvendorid, > - cpu_set_mvendorid, NULL, NULL); > - > object_class_property_add(c, "mimpid", "uint64", cpu_get_mimpid, > cpu_set_mimpid, NULL, NULL); > > -- > 2.43.0 > >
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 9d4243891c..c725a4839d 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1974,6 +1974,41 @@ static const PropertyInfo prop_cboz_blksize = { .set = prop_cboz_blksize_set, }; +static void prop_mvendorid_set(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + bool dynamic_cpu = riscv_cpu_is_dynamic(obj); + RISCVCPU *cpu = RISCV_CPU(obj); + uint32_t prev_val = cpu->cfg.mvendorid; + uint32_t value; + + if (!visit_type_uint32(v, name, &value, errp)) { + return; + } + + if (!dynamic_cpu && prev_val != value) { + error_setg(errp, "Unable to change %s mvendorid (0x%x)", + object_get_typename(obj), prev_val); + return; + } + + cpu->cfg.mvendorid = value; +} + +static void prop_mvendorid_get(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + uint32_t value = RISCV_CPU(obj)->cfg.mvendorid; + + visit_type_uint32(v, name, &value, errp); +} + +static const PropertyInfo prop_mvendorid = { + .name = "mvendorid", + .get = prop_mvendorid_get, + .set = prop_mvendorid_set, +}; + /* * RVA22U64 defines some 'named features' or 'synthetic extensions' * that are cache related: Za64rs, Zic64b, Ziccif, Ziccrse, Ziccamoa @@ -2060,6 +2095,8 @@ static Property riscv_cpu_properties[] = { {.name = "cbop_blocksize", .info = &prop_cbop_blksize}, {.name = "cboz_blocksize", .info = &prop_cboz_blksize}, + {.name = "mvendorid", .info = &prop_mvendorid}, + #ifndef CONFIG_USER_ONLY DEFINE_PROP_UINT64("resetvec", RISCVCPU, env.resetvec, DEFAULT_RSTVEC), #endif @@ -2140,35 +2177,6 @@ static const struct SysemuCPUOps riscv_sysemu_ops = { }; #endif -static void cpu_set_mvendorid(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) -{ - bool dynamic_cpu = riscv_cpu_is_dynamic(obj); - RISCVCPU *cpu = RISCV_CPU(obj); - uint32_t prev_val = cpu->cfg.mvendorid; - uint32_t value; - - if (!visit_type_uint32(v, name, &value, errp)) { - return; - } - - if (!dynamic_cpu && prev_val != value) { - error_setg(errp, "Unable to change %s mvendorid (0x%x)", - object_get_typename(obj), prev_val); - return; - } - - cpu->cfg.mvendorid = value; -} - -static void cpu_get_mvendorid(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) -{ - uint32_t value = RISCV_CPU(obj)->cfg.mvendorid; - - visit_type_uint32(v, name, &value, errp); -} - static void cpu_set_mimpid(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { @@ -2278,9 +2286,6 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data) cc->gdb_arch_name = riscv_gdb_arch_name; cc->gdb_get_dynamic_xml = riscv_gdb_get_dynamic_xml; - object_class_property_add(c, "mvendorid", "uint32", cpu_get_mvendorid, - cpu_set_mvendorid, NULL, NULL); - object_class_property_add(c, "mimpid", "uint64", cpu_get_mimpid, cpu_set_mimpid, NULL, NULL);
Keep all class properties in riscv_cpu_properties[]. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> --- target/riscv/cpu.c | 69 +++++++++++++++++++++++++--------------------- 1 file changed, 37 insertions(+), 32 deletions(-)