mbox series

[v2,0/2] riscv: add rv32i,rv32e and rv64e CPUs

Message ID 20240108161903.353648-1-dbarboza@ventanamicro.com (mailing list archive)
Headers show
Series riscv: add rv32i,rv32e and rv64e CPUs | expand

Message

Daniel Henrique Barboza Jan. 8, 2024, 4:19 p.m. UTC
Hi,

This is the second version of a buried patch series:

"[PATCH for-9.0 0/6] riscv: rv32i,rv32e,rv64i and rv64e CPUs"

This version shrank to 2 patches since most of the prep work was already
done by the RVA22 profile implementation, which is now queued in
riscv-to-apply.next.

The motivation is the same as in v1 - give users a cleaner way of using
a customized CPU, from scratch, without the need to disable default
extensions.

Patches based on Alistair's riscv-to-apply.next.

Changes from v1:
- patches 1 to 4 from v1: dropped
- patches 5 and 6 from v1: merged into patch 2
- patch 1 (new):
  - add a new common cpu_init() for all bare CPUs
- v1 link: https://lore.kernel.org/qemu-riscv/20231113213904.185320-1-dbarboza@ventanamicro.com/


Daniel Henrique Barboza (2):
  target/riscv/cpu.c: add riscv_bare_cpu_init()
  target/riscv: add rv32i, rv32e and rv64e CPUs

 target/riscv/cpu-qom.h |  3 ++
 target/riscv/cpu.c     | 64 ++++++++++++++++++++++++++++++++----------
 2 files changed, 52 insertions(+), 15 deletions(-)

Comments

Alistair Francis Jan. 22, 2024, 3:38 a.m. UTC | #1
On Tue, Jan 9, 2024 at 3:40 AM Daniel Henrique Barboza
<dbarboza@ventanamicro.com> wrote:
>
> Hi,
>
> This is the second version of a buried patch series:
>
> "[PATCH for-9.0 0/6] riscv: rv32i,rv32e,rv64i and rv64e CPUs"
>
> This version shrank to 2 patches since most of the prep work was already
> done by the RVA22 profile implementation, which is now queued in
> riscv-to-apply.next.
>
> The motivation is the same as in v1 - give users a cleaner way of using
> a customized CPU, from scratch, without the need to disable default
> extensions.
>
> Patches based on Alistair's riscv-to-apply.next.
>
> Changes from v1:
> - patches 1 to 4 from v1: dropped
> - patches 5 and 6 from v1: merged into patch 2
> - patch 1 (new):
>   - add a new common cpu_init() for all bare CPUs
> - v1 link: https://lore.kernel.org/qemu-riscv/20231113213904.185320-1-dbarboza@ventanamicro.com/
>
>
> Daniel Henrique Barboza (2):
>   target/riscv/cpu.c: add riscv_bare_cpu_init()
>   target/riscv: add rv32i, rv32e and rv64e CPUs

Do you mind rebasing this on
https://github.com/alistair23/qemu/tree/riscv-to-apply.next ?

Alistai

>
>  target/riscv/cpu-qom.h |  3 ++
>  target/riscv/cpu.c     | 64 ++++++++++++++++++++++++++++++++----------
>  2 files changed, 52 insertions(+), 15 deletions(-)
>
> --
> 2.43.0
>
>