| Message ID | 20240122143030.11904-5-quic_okukatla@quicinc.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | [1/4] interconnect: qcom: icc-rpmh: Add QoS config support | expand |
On Mon, 22 Jan 2024 at 16:39, Odelu Kukatla <quic_okukatla@quicinc.com> wrote: > > Add clock handles for required clocks to be enabled for > configuring QoS on sc7280. > > Change-Id: I58991300ff1d8d2865763d4e79ee81c03586249e > Signed-off-by: Odelu Kukatla <quic_okukatla@quicinc.com> > --- > arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi > index 83b5b76ba179..73acf1bd0f97 100644 > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi > @@ -2099,6 +2099,8 @@ > reg = <0 0x016e0000 0 0x1c080>; > #interconnect-cells = <2>; > qcom,bcm-voters = <&apps_bcm_voter>; > + clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, > + <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>; > }; > > aggre2_noc: interconnect@1700000 { > @@ -2106,6 +2108,7 @@ > compatible = "qcom,sc7280-aggre2-noc"; > #interconnect-cells = <2>; > qcom,bcm-voters = <&apps_bcm_voter>; > + clocks = <&rpmhcc RPMH_IPA_CLK>; Is there any reason to write QoS for the IPA before the IPA starts poking around? The same question applies to aggre1 NoC. > }; > > mmss_noc: interconnect@1740000 { > -- > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, > a Linux Foundation Collaborative Project > >
On 1/22/24 18:43, Dmitry Baryshkov wrote: > On Mon, 22 Jan 2024 at 16:39, Odelu Kukatla <quic_okukatla@quicinc.com> wrote: >> >> Add clock handles for required clocks to be enabled for >> configuring QoS on sc7280. >> >> Change-Id: I58991300ff1d8d2865763d4e79ee81c03586249e >> Signed-off-by: Odelu Kukatla <quic_okukatla@quicinc.com> >> --- >> arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 +++ >> 1 file changed, 3 insertions(+) >> >> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi >> index 83b5b76ba179..73acf1bd0f97 100644 >> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi >> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi >> @@ -2099,6 +2099,8 @@ >> reg = <0 0x016e0000 0 0x1c080>; >> #interconnect-cells = <2>; >> qcom,bcm-voters = <&apps_bcm_voter>; >> + clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, >> + <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>; >> }; >> >> aggre2_noc: interconnect@1700000 { >> @@ -2106,6 +2108,7 @@ >> compatible = "qcom,sc7280-aggre2-noc"; >> #interconnect-cells = <2>; >> qcom,bcm-voters = <&apps_bcm_voter>; >> + clocks = <&rpmhcc RPMH_IPA_CLK>; > > Is there any reason to write QoS for the IPA before the IPA starts > poking around? The same question applies to aggre1 NoC. Yes, as the NIUs require a clock source which may or may not be the peripheral's clock Konrad
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 83b5b76ba179..73acf1bd0f97 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2099,6 +2099,8 @@ reg = <0 0x016e0000 0 0x1c080>; #interconnect-cells = <2>; qcom,bcm-voters = <&apps_bcm_voter>; + clocks = <&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>, + <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>; }; aggre2_noc: interconnect@1700000 { @@ -2106,6 +2108,7 @@ compatible = "qcom,sc7280-aggre2-noc"; #interconnect-cells = <2>; qcom,bcm-voters = <&apps_bcm_voter>; + clocks = <&rpmhcc RPMH_IPA_CLK>; }; mmss_noc: interconnect@1740000 {
Add clock handles for required clocks to be enabled for configuring QoS on sc7280. Change-Id: I58991300ff1d8d2865763d4e79ee81c03586249e Signed-off-by: Odelu Kukatla <quic_okukatla@quicinc.com> --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 3 +++ 1 file changed, 3 insertions(+)