Message ID | 20240123-x1e80100-dts-missing-nodes-v4-3-072dc2f5c153@linaro.org (mailing list archive) |
---|---|
State | Superseded |
Headers | show |
Series | arm64: dts: qcom: Add more support to X1E80100 base dtsi, CRD and QCP boards | expand |
On 1/23/24 12:01, Abel Vesa wrote: > From: Sibi Sankar <quic_sibis@quicinc.com> > > Add a node for the QMP AOSS. > > Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi index 1210351b6538..3790d99eb298 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi @@ -2663,6 +2663,18 @@ pdc: interrupt-controller@b220000 { interrupt-controller; }; + aoss_qmp: power-management@c300000 { + compatible = "qcom,x1e80100-aoss-qmp", "qcom,aoss-qmp"; + reg = <0 0x0c300000 0 0x400>; + interrupt-parent = <&ipcc>; + interrupts-extended = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>; + + #clock-cells = <0>; + }; + + tlmm: pinctrl@f100000 { compatible = "qcom,x1e80100-tlmm"; reg = <0 0x0f100000 0 0xf00000>;