| Message ID | 20240125100501.4137977-2-c-vankar@ti.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add CPSW2G and CPSW9G nodes for J784S4 | expand |
On 1/25/24 4:04 AM, Chintan Vankar wrote: > Change offset in mux-reg-masks property for serdes_ln_ctrl node > since reg-mux property is used in compatible. > > Fixes: 2765149273f4 ("mux: mmio: use reg property when parent device is not a syscon") > Signed-off-by: Chintan Vankar <c-vankar@ti.com> Acked-by: Andrew Davis <afd@ti.com> > --- > arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi > index f2b720ed1e4f..56c8eaad6324 100644 > --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi > @@ -52,12 +52,12 @@ serdes_ln_ctrl: mux-controller@4080 { > compatible = "reg-mux"; > reg = <0x00004080 0x30>; > #mux-control-cells = <1>; > - mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */ > - <0x4088 0x3>, <0x408c 0x3>, /* SERDES0 lane2/3 select */ > - <0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */ > - <0x4098 0x3>, <0x409c 0x3>, /* SERDES1 lane2/3 select */ > - <0x40a0 0x3>, <0x40a4 0x3>, /* SERDES2 lane0/1 select */ > - <0x40a8 0x3>, <0x40ac 0x3>; /* SERDES2 lane2/3 select */ > + mux-reg-masks = <0x0 0x3>, <0x4 0x3>, /* SERDES0 lane0/1 select */ > + <0x8 0x3>, <0xc 0x3>, /* SERDES0 lane2/3 select */ > + <0x10 0x3>, <0x14 0x3>, /* SERDES1 lane0/1 select */ > + <0x18 0x3>, <0x1c 0x3>, /* SERDES1 lane2/3 select */ > + <0x20 0x3>, <0x24 0x3>, /* SERDES2 lane0/1 select */ > + <0x28 0x3>, <0x2c 0x3>; /* SERDES2 lane2/3 select */ > idle-states = <J784S4_SERDES0_LANE0_PCIE1_LANE0>, > <J784S4_SERDES0_LANE1_PCIE1_LANE1>, > <J784S4_SERDES0_LANE2_IP3_UNUSED>,
diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi index f2b720ed1e4f..56c8eaad6324 100644 --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi @@ -52,12 +52,12 @@ serdes_ln_ctrl: mux-controller@4080 { compatible = "reg-mux"; reg = <0x00004080 0x30>; #mux-control-cells = <1>; - mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */ - <0x4088 0x3>, <0x408c 0x3>, /* SERDES0 lane2/3 select */ - <0x4090 0x3>, <0x4094 0x3>, /* SERDES1 lane0/1 select */ - <0x4098 0x3>, <0x409c 0x3>, /* SERDES1 lane2/3 select */ - <0x40a0 0x3>, <0x40a4 0x3>, /* SERDES2 lane0/1 select */ - <0x40a8 0x3>, <0x40ac 0x3>; /* SERDES2 lane2/3 select */ + mux-reg-masks = <0x0 0x3>, <0x4 0x3>, /* SERDES0 lane0/1 select */ + <0x8 0x3>, <0xc 0x3>, /* SERDES0 lane2/3 select */ + <0x10 0x3>, <0x14 0x3>, /* SERDES1 lane0/1 select */ + <0x18 0x3>, <0x1c 0x3>, /* SERDES1 lane2/3 select */ + <0x20 0x3>, <0x24 0x3>, /* SERDES2 lane0/1 select */ + <0x28 0x3>, <0x2c 0x3>; /* SERDES2 lane2/3 select */ idle-states = <J784S4_SERDES0_LANE0_PCIE1_LANE0>, <J784S4_SERDES0_LANE1_PCIE1_LANE1>, <J784S4_SERDES0_LANE2_IP3_UNUSED>,
Change offset in mux-reg-masks property for serdes_ln_ctrl node since reg-mux property is used in compatible. Fixes: 2765149273f4 ("mux: mmio: use reg property when parent device is not a syscon") Signed-off-by: Chintan Vankar <c-vankar@ti.com> --- arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)