Message ID | 20240126-wip-y-moog-phytec-de-upstream-pollux-lvds-v1-2-8ec5b48eec05@phytec.de (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Add support for ETML1010G3DRA LVDS display on phyBOARD-Pollux | expand |
On 1/26/2024 12:57 AM, Yannic Moog wrote: > From: Primoz Fiser <primoz.fiser@norik.com> > > Add support for the EDT ETML1010G3DRA 10.1" 1280x800 LVDS panel. > Datasheet can be found at [1]. > > [1] https://www.glynshop.com/erp/owweb/Daten/DSS/EDT/Products/Specifications/Active%20Displays/ETML1010G3DRA%20Ver.3-RoHS.pdf > > Signed-off-by: Primoz Fiser <primoz.fiser@norik.com> > Signed-off-by: Yannic Moog <y.moog@phytec.de> Hi Yannic, Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com> Thanks, Jessica Zhang > --- > drivers/gpu/drm/panel/panel-simple.c | 30 ++++++++++++++++++++++++++++++ > 1 file changed, 30 insertions(+) > > diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c > index 9367a4572dcf..662cf8d10a8a 100644 > --- a/drivers/gpu/drm/panel/panel-simple.c > +++ b/drivers/gpu/drm/panel/panel-simple.c > @@ -1920,6 +1920,33 @@ static const struct panel_desc edt_etml0700y5dha = { > .connector_type = DRM_MODE_CONNECTOR_LVDS, > }; > > +static const struct display_timing edt_etml1010g3dra_timing = { > + .pixelclock = { 66300000, 72400000, 78900000 }, > + .hactive = { 1280, 1280, 1280 }, > + .hfront_porch = { 12, 72, 132 }, > + .hback_porch = { 86, 86, 86 }, > + .hsync_len = { 2, 2, 2 }, > + .vactive = { 800, 800, 800 }, > + .vfront_porch = { 1, 15, 49 }, > + .vback_porch = { 21, 21, 21 }, > + .vsync_len = { 2, 2, 2 }, > + .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW | > + DISPLAY_FLAGS_DE_HIGH, > +}; > + > +static const struct panel_desc edt_etml1010g3dra = { > + .timings = &edt_etml1010g3dra_timing, > + .num_timings = 1, > + .bpc = 8, > + .size = { > + .width = 216, > + .height = 135, > + }, > + .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, > + .bus_flags = DRM_BUS_FLAG_DE_HIGH, > + .connector_type = DRM_MODE_CONNECTOR_LVDS, > +}; > + > static const struct drm_display_mode edt_etmv570g2dhu_mode = { > .clock = 25175, > .hdisplay = 640, > @@ -4328,6 +4355,9 @@ static const struct of_device_id platform_of_match[] = { > }, { > .compatible = "edt,etml0700y5dha", > .data = &edt_etml0700y5dha, > + }, { > + .compatible = "edt,etml1010g3dra", > + .data = &edt_etml1010g3dra, > }, { > .compatible = "edt,etmv570g2dhu", > .data = &edt_etmv570g2dhu, > > -- > 2.34.1 >
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 9367a4572dcf..662cf8d10a8a 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1920,6 +1920,33 @@ static const struct panel_desc edt_etml0700y5dha = { .connector_type = DRM_MODE_CONNECTOR_LVDS, }; +static const struct display_timing edt_etml1010g3dra_timing = { + .pixelclock = { 66300000, 72400000, 78900000 }, + .hactive = { 1280, 1280, 1280 }, + .hfront_porch = { 12, 72, 132 }, + .hback_porch = { 86, 86, 86 }, + .hsync_len = { 2, 2, 2 }, + .vactive = { 800, 800, 800 }, + .vfront_porch = { 1, 15, 49 }, + .vback_porch = { 21, 21, 21 }, + .vsync_len = { 2, 2, 2 }, + .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW | + DISPLAY_FLAGS_DE_HIGH, +}; + +static const struct panel_desc edt_etml1010g3dra = { + .timings = &edt_etml1010g3dra_timing, + .num_timings = 1, + .bpc = 8, + .size = { + .width = 216, + .height = 135, + }, + .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, + .bus_flags = DRM_BUS_FLAG_DE_HIGH, + .connector_type = DRM_MODE_CONNECTOR_LVDS, +}; + static const struct drm_display_mode edt_etmv570g2dhu_mode = { .clock = 25175, .hdisplay = 640, @@ -4328,6 +4355,9 @@ static const struct of_device_id platform_of_match[] = { }, { .compatible = "edt,etml0700y5dha", .data = &edt_etml0700y5dha, + }, { + .compatible = "edt,etml1010g3dra", + .data = &edt_etml1010g3dra, }, { .compatible = "edt,etmv570g2dhu", .data = &edt_etmv570g2dhu,