[v5,00/11] arm64: dts: qcom: Add more support to X1E80100 base dtsi, CRD and QCP boards

Message

Abel Vesa Jan. 26, 2024, 10 a.m. UTC

This patchset adds every node necessary for both the CRD and QCP to boot
with PCIe, USB and embedded DisplayPort.

This patchset depends on the Disp CC and TCSR CC bindings.

Signed-off-by: Abel Vesa <[e-mail]>
---
Changes in v5:
- Added Konrad's R-b tags to patches 1 through 4 and A-b tag to patch 11
- Changed the clock of the usb2 HS PHY to TCSR_USB2_2_CLKREF_EN, the USB1
  SSx HS PHY seem to be sharing the TCSR_USB2_1_CLKREF_EN
- Prefixed DISP_CC_MDSS_CORE_* gdscs with MDSS_* to be more in line with
  SM8[56]50 platforms.
- Added "cpu-cfg" icc path to the mdss node.
- Marked all USB1 SS[1-3] controllers as dma coherent.
- Re-worded the adding TCSR node commit message by just dropping the
  "halt" word as the halt registers are not part of this region. The
  TCSR offers more than just a clock controller and therefore called it
  generically "TCSR register space".
- Link to v4: https://lore.kernel.org/r/[e-mail]

Changes in v4:
- After a discussion off-list, it was suggested by Bjorn to split in separate patches.
- Addressed all of Konrad's comments, except of the clock-names one for the mdss,
  which there is nothing to be done about as all non-v5 do clk_bulk_get_all.
- Added more support to QCP, to be more aligned with CRD (except touchscreen
  and keyboard)
- Added a patch to fix some LDOs supplies on QCP
- Link to v3: https://lore.kernel.org/r/[e-mail]

Changes in v3:
- Reword the commit messages
- Link to v2: https://lore.kernel.org/r/[e-mail]

Changes in v2:
- Reword both commits to make it more clear nodes that are being added
- Dropped comments from interrupt maps from pcie nodes
- Replace all 0x0 with 0 in all reg properties
- Moved on separate lines reg, reset and clock names
- Dropped the sram and cpucp nodes
- Dropped pmic glink node
- Reordered all new clock controller nodes based on address
- Dropped unnecessary indent from touchpad and keyboard TLMM nodes
- Link to v1: https://lore.kernel.org/r/[e-mail]

---
Abel Vesa (7):
      arm64: dts: qcom: x1e80100: Add TCSR node
      arm64: dts: qcom: x1e80100: Add USB nodes
      arm64: dts: qcom: x1e80100: Add PCIe nodes
      arm64: dts: qcom: x1e80100: Add display nodes
      arm64: dts: qcom: x1e80100-crd: Enable more support
      arm64: dts: qcom: x1e80100-qcp: Enable more support
      arm64: dts: qcom: x1e80100-qcp: Fix supplies for LDOs 3E and 2J

Sibi Sankar (4):
      arm64: dts: qcom: x1e80100: Add IPCC node
      arm64: dts: qcom: x1e80100: Add SMP2P nodes
      arm64: dts: qcom: x1e80100: Add QMP AOSS node
      arm64: dts: qcom: x1e80100: Add ADSP/CDSP remoteproc nodes

 arch/arm64/boot/dts/qcom/x1e80100-crd.dts |  222 +++++
 arch/arm64/boot/dts/qcom/x1e80100-qcp.dts |  175 +++-
 arch/arm64/boot/dts/qcom/x1e80100.dtsi    | 1368 ++++++++++++++++++++++++++++-
 3 files changed, 1758 insertions(+), 7 deletions(-)
---
base-commit: 853dab01a34378871b37a5e6a800e97a997fe16c
change-id: 20231201-x1e80100-dts-missing-nodes-a09f1ed99999

Best regards,

Comments

Bjorn Andersson Jan. 28, 2024, 2:36 a.m. UTC | #1

On Fri, Jan 26, 2024 at 12:00:11PM +0200, Abel Vesa wrote:
> This patchset adds every node necessary for both the CRD and QCP to boot
> with PCIe, USB and embedded DisplayPort.
> 
> This patchset depends on the Disp CC and TCSR CC bindings.

I'm guessing you're referring to the patches from December, which has
review feedback from your colleagues?

Please respin the clock series.

Thanks,
Bjorn

> 
> Signed-off-by: Abel Vesa <[e-mail]>
> ---
> Changes in v5:
> - Added Konrad's R-b tags to patches 1 through 4 and A-b tag to patch 11
> - Changed the clock of the usb2 HS PHY to TCSR_USB2_2_CLKREF_EN, the USB1
>   SSx HS PHY seem to be sharing the TCSR_USB2_1_CLKREF_EN
> - Prefixed DISP_CC_MDSS_CORE_* gdscs with MDSS_* to be more in line with
>   SM8[56]50 platforms.
> - Added "cpu-cfg" icc path to the mdss node.
> - Marked all USB1 SS[1-3] controllers as dma coherent.
> - Re-worded the adding TCSR node commit message by just dropping the
>   "halt" word as the halt registers are not part of this region. The
>   TCSR offers more than just a clock controller and therefore called it
>   generically "TCSR register space".
> - Link to v4: https://lore.kernel.org/r/[e-mail]
> 
> Changes in v4:
> - After a discussion off-list, it was suggested by Bjorn to split in separate patches.
> - Addressed all of Konrad's comments, except of the clock-names one for the mdss,
>   which there is nothing to be done about as all non-v5 do clk_bulk_get_all.
> - Added more support to QCP, to be more aligned with CRD (except touchscreen
>   and keyboard)
> - Added a patch to fix some LDOs supplies on QCP
> - Link to v3: https://lore.kernel.org/r/[e-mail]
> 
> Changes in v3:
> - Reword the commit messages
> - Link to v2: https://lore.kernel.org/r/[e-mail]
> 
> Changes in v2:
> - Reword both commits to make it more clear nodes that are being added
> - Dropped comments from interrupt maps from pcie nodes
> - Replace all 0x0 with 0 in all reg properties
> - Moved on separate lines reg, reset and clock names
> - Dropped the sram and cpucp nodes
> - Dropped pmic glink node
> - Reordered all new clock controller nodes based on address
> - Dropped unnecessary indent from touchpad and keyboard TLMM nodes
> - Link to v1: https://lore.kernel.org/r/[e-mail]
> 
> ---
> Abel Vesa (7):
>       arm64: dts: qcom: x1e80100: Add TCSR node
>       arm64: dts: qcom: x1e80100: Add USB nodes
>       arm64: dts: qcom: x1e80100: Add PCIe nodes
>       arm64: dts: qcom: x1e80100: Add display nodes
>       arm64: dts: qcom: x1e80100-crd: Enable more support
>       arm64: dts: qcom: x1e80100-qcp: Enable more support
>       arm64: dts: qcom: x1e80100-qcp: Fix supplies for LDOs 3E and 2J
> 
> Sibi Sankar (4):
>       arm64: dts: qcom: x1e80100: Add IPCC node
>       arm64: dts: qcom: x1e80100: Add SMP2P nodes
>       arm64: dts: qcom: x1e80100: Add QMP AOSS node
>       arm64: dts: qcom: x1e80100: Add ADSP/CDSP remoteproc nodes
> 
>  arch/arm64/boot/dts/qcom/x1e80100-crd.dts |  222 +++++
>  arch/arm64/boot/dts/qcom/x1e80100-qcp.dts |  175 +++-
>  arch/arm64/boot/dts/qcom/x1e80100.dtsi    | 1368 ++++++++++++++++++++++++++++-
>  3 files changed, 1758 insertions(+), 7 deletions(-)
> ---
> base-commit: 853dab01a34378871b37a5e6a800e97a997fe16c
> change-id: 20231201-x1e80100-dts-missing-nodes-a09f1ed99999
> 
> Best regards,
> -- 
> Abel Vesa <[e-mail]>
>

Abel Vesa Jan. 28, 2024, 10:58 p.m. UTC | #2

On 24-01-27 20:36:33, Bjorn Andersson wrote:
> On Fri, Jan 26, 2024 at 12:00:11PM +0200, Abel Vesa wrote:
> > This patchset adds every node necessary for both the CRD and QCP to boot
> > with PCIe, USB and embedded DisplayPort.
> > 
> > This patchset depends on the Disp CC and TCSR CC bindings.
> 
> I'm guessing you're referring to the patches from December, which has
> review feedback from your colleagues?
> 
> Please respin the clock series.

Was trying to figure out the GCC_DISP_AHB_CLK pm_clk_add()-ed to the
dispcc. But as discussed off-list, GCC_DISP_XO_CLK falls into same
category and I'm not sure what it is tied to (yet).

Anyway, that should be a separate patchset as it should fix SM8550 and
SM8650 as well.

Meanwhile, here are the clock controllers:
https://lore.kernel.org/r/[e-mail]

> 
> Thanks,
> Bjorn
> 
> > 
> > Signed-off-by: Abel Vesa <[e-mail]>
> > ---
> > Changes in v5:
> > - Added Konrad's R-b tags to patches 1 through 4 and A-b tag to patch 11
> > - Changed the clock of the usb2 HS PHY to TCSR_USB2_2_CLKREF_EN, the USB1
> >   SSx HS PHY seem to be sharing the TCSR_USB2_1_CLKREF_EN
> > - Prefixed DISP_CC_MDSS_CORE_* gdscs with MDSS_* to be more in line with
> >   SM8[56]50 platforms.
> > - Added "cpu-cfg" icc path to the mdss node.
> > - Marked all USB1 SS[1-3] controllers as dma coherent.
> > - Re-worded the adding TCSR node commit message by just dropping the
> >   "halt" word as the halt registers are not part of this region. The
> >   TCSR offers more than just a clock controller and therefore called it
> >   generically "TCSR register space".
> > - Link to v4: https://lore.kernel.org/r/[e-mail]
> > 
> > Changes in v4:
> > - After a discussion off-list, it was suggested by Bjorn to split in separate patches.
> > - Addressed all of Konrad's comments, except of the clock-names one for the mdss,
> >   which there is nothing to be done about as all non-v5 do clk_bulk_get_all.
> > - Added more support to QCP, to be more aligned with CRD (except touchscreen
> >   and keyboard)
> > - Added a patch to fix some LDOs supplies on QCP
> > - Link to v3: https://lore.kernel.org/r/[e-mail]
> > 
> > Changes in v3:
> > - Reword the commit messages
> > - Link to v2: https://lore.kernel.org/r/[e-mail]
> > 
> > Changes in v2:
> > - Reword both commits to make it more clear nodes that are being added
> > - Dropped comments from interrupt maps from pcie nodes
> > - Replace all 0x0 with 0 in all reg properties
> > - Moved on separate lines reg, reset and clock names
> > - Dropped the sram and cpucp nodes
> > - Dropped pmic glink node
> > - Reordered all new clock controller nodes based on address
> > - Dropped unnecessary indent from touchpad and keyboard TLMM nodes
> > - Link to v1: https://lore.kernel.org/r/[e-mail]
> > 
> > ---
> > Abel Vesa (7):
> >       arm64: dts: qcom: x1e80100: Add TCSR node
> >       arm64: dts: qcom: x1e80100: Add USB nodes
> >       arm64: dts: qcom: x1e80100: Add PCIe nodes
> >       arm64: dts: qcom: x1e80100: Add display nodes
> >       arm64: dts: qcom: x1e80100-crd: Enable more support
> >       arm64: dts: qcom: x1e80100-qcp: Enable more support
> >       arm64: dts: qcom: x1e80100-qcp: Fix supplies for LDOs 3E and 2J
> > 
> > Sibi Sankar (4):
> >       arm64: dts: qcom: x1e80100: Add IPCC node
> >       arm64: dts: qcom: x1e80100: Add SMP2P nodes
> >       arm64: dts: qcom: x1e80100: Add QMP AOSS node
> >       arm64: dts: qcom: x1e80100: Add ADSP/CDSP remoteproc nodes
> > 
> >  arch/arm64/boot/dts/qcom/x1e80100-crd.dts |  222 +++++
> >  arch/arm64/boot/dts/qcom/x1e80100-qcp.dts |  175 +++-
> >  arch/arm64/boot/dts/qcom/x1e80100.dtsi    | 1368 ++++++++++++++++++++++++++++-
> >  3 files changed, 1758 insertions(+), 7 deletions(-)
> > ---
> > base-commit: 853dab01a34378871b37a5e6a800e97a997fe16c
> > change-id: 20231201-x1e80100-dts-missing-nodes-a09f1ed99999
> > 
> > Best regards,
> > -- 
> > Abel Vesa <[e-mail]>
> >

Bjorn Andersson Feb. 7, 2024, 4:46 a.m. UTC | #3

On Fri, 26 Jan 2024 12:00:11 +0200, Abel Vesa wrote:
> This patchset adds every node necessary for both the CRD and QCP to boot
> with PCIe, USB and embedded DisplayPort.
> 
> This patchset depends on the Disp CC and TCSR CC bindings.
> 
> 

Applied, thanks!

[01/11] arm64: dts: qcom: x1e80100: Add IPCC node
        commit: 6a07a4f3f509c370c4f2644c2f576d1e8029354c
[02/11] arm64: dts: qcom: x1e80100: Add SMP2P nodes
        commit: 0b6ae7364b1133f55eec027e358eec09d3bdc2ff
[03/11] arm64: dts: qcom: x1e80100: Add QMP AOSS node
        commit: 2661646f5934c9e6a4067ac325ef023eef611423
[04/11] arm64: dts: qcom: x1e80100: Add ADSP/CDSP remoteproc nodes
        commit: 5f2a9cd4b1042ade3824cfe324aa02a3c17430a8
[05/11] arm64: dts: qcom: x1e80100: Add TCSR node
        commit: 8b6e2bf94b278c69746358425daae2a75041f7dc
[06/11] arm64: dts: qcom: x1e80100: Add USB nodes
        commit: 4af46b7bd66fa3ad9bd87e2ded26599d11562d52
[07/11] arm64: dts: qcom: x1e80100: Add PCIe nodes
        commit: 5eb83fc10289db0c13ceaea601151883c0da43f4
[08/11] arm64: dts: qcom: x1e80100: Add display nodes
        commit: 1940c25eaa63f65942e6149715e17a61438e2162
[09/11] arm64: dts: qcom: x1e80100-crd: Enable more support
        commit: d7e03cce0400cb42d79088a3bb0a59f63bdf50b3
[10/11] arm64: dts: qcom: x1e80100-qcp: Enable more support
        commit: f9a9c11471da32133ea6ee8763f932b91018e256
[11/11] arm64: dts: qcom: x1e80100-qcp: Fix supplies for LDOs 3E and 2J
        commit: 7eac281cbedbd71d777eabca3a52d97983c61692

Best regards,